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Reliable DRC Voltage Text Annotation Means Faster And More Accurate DRC Verification


As the potential for complex interactions between voltage domains grows significantly with the increase in design density at each new process node, the complexity of spacing checks in design rule checking (DRC) also increases. To minimize these types of risk, many simple spacing checks have evolved to become voltage-aware DRC (VA-DRC) checks that incorporate voltage values to determine the requ... » read more

In-Design Signoff DRC For Productivity Improvement


Microsemi, a wholly-owned subsidiary of Microchip Technology, produces a portfolio of semiconductor and system solutions for communications, defense and security, aerospace, and industrial markets. In addition to high-performance and radiation-hardened analog/mixed-signal integrated circuits, FPGAs, SoCs and ASICs, they also design power management products, timing and synchronization devices, ... » read more

Optimize Physical Verification Cost Of Ownership


As semiconductor designs continue to grow in size and complexity, they put increasing pressure on every stage of the design process. Physical verification, often on the critical path to tape-out, is especially affected. Design rule checking (DRC), layout versus schematic (LVS), and other physical verification runs take longer as chip size increases. In addition, finer geometries introduce new c... » read more

Fast-Track Your Early SoC Design Exploration And Verification


By Nermeen Hossam and John Ferguson Most advanced node system-on-chip (SoC) designs are very large, and very complex. They typically contain many blocks and intellectual property (IP) that perform specialized functions, such as computation, internal communications, and signal processing. These blocks are often built by separate teams or IP suppliers, and integrated into the SoC layout. Howev... » read more

Moving Beyond Geometries: Context-Aware Verification Improves Design Quality And Reliability


Context-aware checks integrate physical and electrical information to evaluate a wide range of design conditions, from advanced design rule compliance, to circuit and reliability verification, to design optimization and finishing. Automated context-aware checking provides designers with actionable results that improve both debugging efficiency and verification precision. Introduction Many p... » read more

How Qualcomm Got Faster Signoff DRC Convergence


Qualcomm Incorporated designs and markets wireless telecommunications products and services that are the foundational technologies that others build upon, from mobile processors to embedded platforms, Bluetooth products, and cellular modems. In the fast-moving mobile phone market in which Qualcomm competes, companies who can get to market more quickly gain a strong competitive advantage, along ... » read more

Design For Advanced Packaging


Advanced packaging techniques are viewed as either a replacement for Moore's Law scaling, or a way of augmenting it. But there is a big gap between the extensive work done to prove these devices can be manufactured with sufficient yield and the amount of attention being paid to the demands advanced packaging has on the design and verification flows. Not all advanced packaging places the same... » read more

Get Ready For Integrated Silicon Photonics


Long-haul communications and data centers are huge buyers of photonics components, and that is leading to rapid advances in the technology and opening new markets and opportunities. The industry has to adapt to meet the demands being placed on it and solve the bottlenecks in the design, development and fabrication of integrated silicon photonics. "Look at the networking bandwidth used across... » read more

EUV’s New Problem Areas


Extreme ultraviolet (EUV) lithography is moving closer to production, but problematic variations—also known as stochastic effects—are resurfacing and creating more challenges for the long-overdue technology. GlobalFoundries, Intel, Samsung and TSMC hope to insert [gettech id="31045" comment="EUV"] lithography into production at 7nm and/or 5nm. But as before, EUV consists of several compo... » read more

Integrated Photonics (Part 3)


Semiconductor Engineering sat down to discuss the status of integrated photonics with Twan Korthorst, CEO for PhoeniX Software; Gilles Lamant, distinguished engineer for [getentity id="22032" e_name="Cadence"]; Bill De Vries, director of marketing for Lumerical Solutions; and Brett Attaway, director of EPDA solutions at AIM Photonics, SUNY Polytechnic Institute. What follows are excerpts of tha... » read more

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