China’s Electric Car Ambitions


China, the world’s largest car market, is also leading the charge in the electric vehicle business. But with little or no fanfare, China also wants to dominate the critical ecosystem for battery-electric vehicles and hybrids. In fact, the nation is already the world’s largest producer of batteries for electric vehicles. And it also controls a sizable part of the supply chain, such as the... » read more

Physical Verification For Silicon Photonics: Don’t Panic!


Silicon photonics augments traditional electrical signals in integrated circuits (ICs) with light transmission to speed up data transfer and reduce power consumption. According to MarketsandMarkets, the overall silicon photonics market is worth approximately $774.1M in 2018, and is expected to reach $1,988.2M by 2023, at a CAGR of 20.8% between 2018 and 2023  [1]. Cloud computing is one market... » read more

Week In Review: Design, Low Power


Aldec expanded the rule-checking capabilities of its ALINT-PRO tool, adding twice as many FSM checks and new graphical representations to aid state exploration. Also included is enhanced setup automation for complex Xilinx Vivado and ISE projects that automatically organizes a workspace to deliver hierarchical and incremental DRC and CDC analysis. Xilinx acquired AI startup DeePhi Technology... » read more

5nm Design Progress


Activity surrounding the 5nm manufacturing process node is quickly ramping, creating a better picture of the myriad and increasingly complex design issues that must be overcome. Progress at each new node after 28nm has required an increasingly tight partnership between the foundries, which are developing new processes and rule decks, along with EDA and IP vendors, which are adding tools, met... » read more

Optimizing Your DRC Debug Can Reap Big Productivity Gains


Debugging design violations found by design rule checking (DRC) has always taken a significant share of the time needed to get a design to tapeout. And debug time only increases as the number and complexity of DRC expands with each new process node. Any steps you can take to make your DRC debug process more efficient directly improves your productivity. One technique for minimizing debug tim... » read more

Advanced 3D Design Technology Co-Optimization For Manufacturability


By Yu De Chen, Jacky Huang, Dalong Zhao, Jiangjiang (Jimmy) Gu, and Joseph Ervin Yield and cost have always been critical factors for both manufacturers and designers of semiconductor products. It is a continuous challenge to meet targets of both yield and cost, due to new device structures and the increasing complexity of process innovations introduced to achieve improved product performanc... » read more

Interface DRC Can Streamline Chip-Level Interface Physical Verification


In most design companies, the chip-level physical implementation teams responsible for design floorplanning in place and route (P&R) environments also manage top-level physical verification from the early floorplanning stages through tapeout. In early floorplanning stages, blocks placed in the chip-level floorplan are usually still under development. Merging these incomplete blocks with the... » read more

EUV’s New Problem Areas


Extreme ultraviolet (EUV) lithography is moving closer to production, but problematic variations—also known as stochastic effects—are resurfacing and creating more challenges for the long-overdue technology. GlobalFoundries, Intel, Samsung and TSMC hope to insert [gettech id="31045" comment="EUV"] lithography into production at 7nm and/or 5nm. But as before, EUV consists of several compo... » read more

A Reliability Baseline Is Essential For Today’s Complex IC Designs


Design rule checking (DRC) represents a common platform by which we can all compare relative rule complexity. The industry expectation is that all foundries will provide complete DRC and layout vs. schematic (LVS) rule decks at all process nodes for the successful tape-out of IC designs. However, not only are DRC operations growing significantly (Figure 1), but the scope of the rules needed to ... » read more

The Week In Review: Design


M&A Barco Silex, now named Silex Inside, split from parent company Barco in a management buyout in partnership with a group of private investors lead by Dutch investment company Vehold BV. The company will continue its focus on security, video compression, and interface IP, along with design services. Tools & IP Mentor is making a version of its HyperLynx design rule checking tool ... » read more

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