Solving The Design And Verification Challenges Of High Density Advanced Packaging

How to use IC processes for fan-outs, 2.5D and wafer-on-wafer.


This paper discusses ways in which design teams can apply silicon (IC) type processes to the design and verification of the emerging HDAP packages.

High Density Advanced Packaging, or HDAP, is the next-generation architecture for increased functional density, higher performance, lower power, smaller PCB footprints, and thinner profiles. This new “breed” of disruptive packaging technology includes: FOWLP, interposer-based packages (2.5D), CoWoS, high pin-count flip chip, and Wafer-on-Wafer. These new solutions present unique challenges to traditional design tools, are highly disruptive to traditional design methodologies, and disorder the supply chain. To read more, click here.

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