System-Aware SoC Power, Noise And Reliability Sign-off

When devices are operated at lower voltages, the noise margin is reduced significantly — especially with finFETs.


In globally competitive markets for mobile, consumer and automotive electronic systems, the critical success factors are power consumption, performance and reliability. To manage these conflicting requirements, design teams consider multiple options, including the use of advanced process technology nodes — especially finFET-based devices. These advanced technology nodes allow chips to operate faster at lower power and to pack more functionality within the same size of silicon. In these process nodes, however, power, noise and reliability sign-off create significant problems arising out of the physics, size and shape of the devices and interconnects.

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