Variation’s Long, Twisty Tail Worsens At 7/5nm

By Ed Sperling - 20 Sep, 2018 - Comments: 1

Variation is becoming a bigger challenge at each new node, but not just for obvious reasons and not always from the usual sources. Nevertheless, dealing with these issues takes additional time and resources, and it can affect the performance and reliability of those chips throughout their lifetimes. At a high level, variation historically was viewed as a mismatch between what design teams in... » read more

What Happened To Nanoimprint Litho?

By Mark LaPedus - 29 Mar, 2018 - Comments: 4

Nanoimprint lithography (NIL) is re-emerging amid an explosion of new applications in the market. Canon, EV Group, Nanonex, Suss and others continue to develop and ship NIL systems for a range of markets. NIL is different than conventional lithography and resembles a stamping process. Initially, a lithographic system forms a pattern on a template based on a pre-defined design. Then, a separa... » read more

Overlay Challenges On The Rise

By Mark LaPedus - 16 Nov, 2017 - Comments: 2

The overlay metrology equipment market is heating up at advanced nodes as the number of masking layers grows and the size of the features that need to be aligned continue to shrink. Both ASML and KLA-Tencor recently introduced new [getkc id="307" kc_name="overlay"] metrology systems, seeking to address the increasing precision required for lines, cuts and other features on each layer. At 10/... » read more

Multi-Patterning Issues At 7nm, 5nm

By Ed Sperling - 28 Nov, 2016 - Comments: 13

Continuing to rely on 193nm immersion lithography with multiple patterning is becoming much more difficult at 7nm and 5nm. With the help of various resolution enhancement techniques, optical lithography using a deep ultraviolet excimer laser has been the workhorse patterning technology in the fab since the early 1980s. It is so closely tied with the continuation of [getkc id="74" comment="Mo... » read more

Multiple Lithography Options Still Remain in Play

By Paula Doe - 03 Aug, 2015 - Comments: 1

The throughput and uptime of EUV, and the overlay accuracy of 193nm immersion lithography, continue to steadily improve, though neither is yet ready for 10nm production, according to speakers at SEMICON West. Mike Lercel, ASML director, Product Marketing, reported several EUV tool sites achieved 70 percent uptime for more than a week, and one customer site had done so for more than four ... » read more

What Happened To Next-Gen Lithography?

By Mark LaPedus - 03 Sep, 2014 - Comments: 2

Chipmakers continue to march down the process technology curve. Using today’s optical lithography and multiple patterning, the semiconductor industry is scaling its leading-edge devices far beyond what was once considered possible. The question is how far can the industry extend 193nm immersion [getkc id="80" comment="lithography"] and multiple patterning before these technologies become t... » read more

Reaching For The Reset Button In Lithography

By Mark LaPedus - 21 Mar, 2013 - Comments: 0

By Mark LaPedus Amid ongoing delays and setbacks, extreme ultraviolet (EUV) lithography and multi-beam e-beam have both missed the 10nm logic node. So for the present, chipmakers must take the brute force route at 10nm by using 193nm immersion with multiple patterning. Now, it’s time to hit the reset button. For the 7nm node, chipmakers currently are lining up the lithographic competition... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer