Reaching For The Reset Button In Lithography

DSA is gaining far more attention as delays continue to plague EUV and the threat of multipatterning increases.


By Mark LaPedus
Amid ongoing delays and setbacks, extreme ultraviolet (EUV) lithography and multi-beam e-beam have both missed the 10nm logic node. So for the present, chipmakers must take the brute force route at 10nm by using 193nm immersion with multiple patterning.

Now, it’s time to hit the reset button. For the 7nm node, chipmakers currently are lining up the lithographic competition. As before, with perhaps a slightly different twist, the candidates are EUV, multi-beam and the old standby, 193nm immersion with multiple patterning.

The same candidates also are competing for next-generation DRAM and NAND production. Nanoimprint is vying for a spot in NAND. But another option, directed self-assembly (DSA), could change the entire landscape if chipmakers can bring the technology from the lab to the fab.

Based on the delays with EUV, chipmakers could end up using 193nm with multiple patterning at 7nm. But they also are shuddering at the thought, as the costs and complexities for multiple patterning are enormous.

At 7nm, IC makers would prefer to use EUV or maskless for the critical or cut layers. But after a series of ongoing delays with these next-generation lithography (NGL) candidates, lithographers clearly are frustrated and beginning to run out of patience. “I am not happy with the progress of EUV,” said Burn Lin, vice president of research and development at Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC). “I am also not happy with the progress of maskless, but it is making progress.”

Lin, considered the father of immersion lithography, is the industry’s biggest proponent for multi-beam e-beam. In addition, TSMC has installed an EUV scanner and recently invested in ASML to jumpstart technology. Intel and Samsung also have invested in ASML.

EUV or bust?
For now, chipmakers hope to put EUV in pilot production at the 10nm logic and next-generation memory nodes. At 7nm, EUV remains the leading NGL candidate, with maskless running a distant second. TSMC still has EUV and maskless running neck-and-neck, although both technologies could be used in production for different applications.

To date, the progress with EUV is mixed. ASML Holding’s production-worthy EUV scanner, the NXE:3300B, is ready to roll. The scanner has a numerical aperture (NA) of 0.33 and a resolution of 22nm (half-pitch). ASML plans to ship the first NXE:3300B in the second quarter of 2013, but the throughputs are far less than previously advertised.

The throughput issues are due to the source, which is being developed by Cymer. The development of the EUV source has been “more difficult than what we anticipated,” said David Brandt, senior director of EUV marketing and business development at Cymer, which recently was acquired by ASML.

Last year, Cymer promised to ship a 100 Watt source by the end of 2012. So far, in the lab, Cymer has demonstrated the ability to generate 40 Watts and 50 Watts of EUV power. A 55 Watt source translates to an EUV throughput of 43 wafers an hour.

Cymer’s EUV source is based on laser-produced plasma (LPP) technology. In LPP, plasma is generated by a laser pulse hitting a target. The source also makes use of a pre-pulse laser and a master-oscillator power amplifier (MOPA), which will help generate more EUV power.

By the end of 2013, Cymer hopes to ship an 80 Watt source with a MOPA upgrade, enabling an EUV throughput of 58 wafers per hour. By 2015, ASML hopes to ship an EUV scanner with a 250 Watt source, which translates to a throughput of 126 wafers an hour.

Two other vendors, Gigaphoton and Xtreme, are racing against Cymer to deliver a 250 Watt EUV source. So far, Gigaphoton has achieved an EUV light output equivalent to a maximum of 20 Watts, said Yuji Minegishi, manager of the sales division for the company.

By 2015 or so, the IC industry is expected to be at the 10nm node. EUV is a 13.5nm wavelength technology, meaning chipmakers must use multiple pattering with EUV. With self-aligned double patterning (SADP), ASML’s NXE:3300B has demonstrated resolutions down to 9nm.

But if EUV is used in conjunction with double patterning, the EUV scanner itself will require twice the source power than before—or about 500 Watts, contends TSMC’s Lin. However, to deal with the resists, Yan Borodovsky, a senior fellow and director of advanced lithography at Intel, recently said that EUV source power needs to be in the range of 1,000 Watts.

Another way to extend EUV is by moving to higher NAs. For example, with an NA of 0.45, an EUV scanner can print 9.5nm feature sizes, but the image contrast drops, according to Zeiss. To address that problem, the current 4X magnification scheme can be increased to 6X or 8X.

Current EUV scanners with 4X magnification support standard 6-inch photomasks. A 0.45 NA lens with 6X magnification may improve EUV resolutions, but in some cases, that solution may require the photomask industry to move to a new and larger 9-inch mask size. In other words, photomask tool makers must develop new equipment.

“I don’t think we should give up on 4X just yet,” said Harry Levinson, senior fellow and manager of strategic lithography technology at GlobalFoundries, at the recent SPIE conference. “We may be able to extend 4X a bit. Maybe for a later node, we can go for more of these radical changes, such as larger format masks and higher lens reductions.”

Still, Levinson urged the industry to explore the idea of moving toward 9-inch masks, a move that is less painful than some might think. To support 9-inch reticles, the optics and other critical parts of a photomask tool will not need to be re-engineered, but vendors will need to develop new handling systems, he said.

In another scenario, EUV with 8X magnification could support 6-inch masks, but scanning would be done in a smaller field size. “You put this all together and we get less than half the throughput at 8X than 4X,” he said. “This is not an attractive situation.”

Beam me up
Amazingly, multi-beam e-beam or maskless lithography has seen more delays than EUV. Summarizing the state of multi-beam, Serge Tedesco, lithography program manager at CEA-Leti, said: “It’s a shame. There is a lack of support from the industry, when you compare it to the EUV side. This is one of the reasons why the technology is not mature yet.”

In 2002, for example, Mapper Lithography claimed that within three years it would ship its 13,000-beam tool for the 45nm node. As it turned out, Mapper’s initial production tool, which only will consist of 1,300 beams, won’t ship until the end of 2013.

Two other vendors, KLA-Tencor and Multibeam, are separately developing multi-beam tools. In another major move, Golden Gate Capital, a venture capital firm, recently sold its e-beam company, Vistec, to two different companies.

In one transaction, Raith recently acquired Vistec’s Gaussian e-beam unit, called Vistec Lithography. Vistec Lithography continues to specialize in conventional direct-write applications in the aerospace and military arena.

In a separate move, the Heidenhain Group recently acquired Vistec’s variable shaped beam (VSB) e-beam unit. That operation, Vistec Electron Beam, sells a single-beam e-beam tool based on VSB technology. It also is working on a multi-beam tool based on a variant of VSB called multi-shape beam (MSB), said Ines Stolberg, manager of strategic marketing at Vistec Electron Beam.

Given that MSB is based on proven VSB technology, Vistec Electron Beam may have an advantage over rival multi-beam approaches, said Hans Pfeiffer, principal of HCP Consulting. “This has a greater chance for success,” Pfeiffer said.

Multi-beam’s future still remains unclear, as only two entities, CEA-Leti and TSMC, are basically propping up and supporting the entire industry. CEA-Leti recently launched the Imagine Program, a multinational consortium aimed to bring maskless into production.

TSMC is working with both KLA-Tencor and Mapper. For years, KLA-Tencor has been developing what it calls Reflective Electron Beam Lithography (REBL). REBL makes use of a six-wafer rotary stage and a linear column. The 75-100-KeV design also consists of a CMOS-based digital pattern generator module, a 4,096 x 247 pixel array unit that enables more than 1 million beams at full current.

When operating with the rotary stage, REBL has demonstrated the ability to print 120nm half-pitch resolutions, a modest effort at best. In a static mode, the tool demonstrated 28nm resolutions, said Thomas Gubiotti of KLA-Tencor. A high-throughput version of REBL is due out in 2015.

Rival Mapper is developing a multi-beam tool, which is supposed to consist of 13,260 beams with sub-25nm resolutions. However, the first production tool, dubbed the Matrix 1.1, will consist of only 1,300 beams and a throughput of 1 wafer an hour, according to CEA-Leti. In June, CEA-Leti is expected to receive one of the first Matrix 1.1 tools. First exposures for the Matrix 1.1 are slated for the fourth quarter of 2013.

By 2015 or 2016, the overall goal is to cluster 10 Matrix systems together, enabling an overall throughput of 100 wafers an hour. In terms of the cost-of-ownership (COO), the Matrix runs €1 million for a system with a throughput of 2 wafers per hours, €5 million for 10 wafers an hour, and $50 million euros for a 10-cluster unit.

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