tag: 2D materials

Large-Scale Integration Of 2D Materials As The Semiconducting Channel In An In-Memory Processor (EPFL)
By Technical Paper Link - 03 Jan, 2024 - Comments: 0

A technical paper titled “A large-scale integrated vector-matrix multiplication processor based on monolayer molybdenum disulfide memories” was published by researchers at École Polytechnique Fédérale de Lausanne (EPFL). Abstract: "Data-driven algorithms—such as signal processing and artificial neural networks—are required to process and extract meaningful information from the mass... » read more

Research Bits: Dec. 18
By Jesse Allen - 18 Dec, 2023 - Comments: 0

Stacking 2D layers for AI processing Researchers from Washington University in St. Louis, MIT, Yonsei University, Inha University, Georgia Institute of Technology, and the University of Notre Dame demonstrated monolithic 3D integration of layered 2D material, creating a novel AI processing hardware that integrates sensing, signal processing, and AI computing functions into a single chip. Th... » read more

A Polymer-Free Technique For Assembling Van Der Waals Heterostructures Using Flexible Si Nitride Membranes
By Technical Paper Link - 12 Dec, 2023 - Comments: 0

A technical paper titled “Clean assembly of van der Waals heterostructures using silicon nitride membranes” was published by researchers at University of Manchester, Imperial College London, National Institute for Materials Science (Japan), and University of Lancaster. Abstract Van der Waals heterostructures are fabricated by layer-by-layer assembly of individual two-dimensional mater... » read more

Chip Industry Week In Review
By The SE Staff - 08 Dec, 2023 - Comments: 0

By Jesse Allen, Karen Heyman, and Liz Allan AMD took the covers off new AI accelerators for training and inferencing of large language model and high-performance computing workloads. In its announcement, AMD focused heavily on performance leadership in the commercial AI processor space through a combination of architectural changes, better software efficiency, along with some improvements in... » read more

Investigating Subthreshold Current Suppression in ReS2 Nanosheet-Based FETs
By Technical Paper Link - 26 Nov, 2023 - Comments: 0

A technical paper titled “Subthreshold Current Suppression in ReS2 Nanosheet-Based Field-Effect Transistors at High Temperatures” was published by researchers at University of Salerno, Università degli studi del Sannio, and University of Exeter. Abstract: "Two-dimensional rhenium disulfide (ReS2), a member of the transition-metal dichalcogenide family, has received significant attention... » read more

A Modelling Approach To Well-Known And Exotic 2D Materials For Next-Gen FETs
By Technical Paper Link - 31 Oct, 2023 - Comments: 0

A technical paper titled “Field-Effect Transistors based on 2-D Materials: a Modeling Perspective” was published by researchers at ETH Zurich. Abstract: "Two-dimensional (2D) materials are particularly attractive to build the channel of next-generation field-effect transistors (FETs) with gate lengths below 10-15 nm. Because the 2D technology has not yet reached the same level of maturity... » read more

Discovering Orbital Multiferroicity in Pentalayer Rhombohedral Graphene (MIT)
By Technical Paper Link - 24 Oct, 2023 - Comments: 0

A technical paper titled “Orbital Multiferroicity in Pentalayer Rhombohedral Graphene” was published by researchers at Massachusetts Institute of Technology. Abstract (partial): "Ferroic orders describe spontaneous polarization of spin, charge, and lattice degrees of freedom in materials. Materials featuring multiple ferroic orders, known as multiferroics, play important roles in multi-fu... » read more

Integration Of Layered Semimetals With Conventional CMOS Platform
By Technical Paper Link - 27 Sep, 2023 - Comments: 0

A technical paper titled “Layered semimetal electrodes for future heterogeneous electronics” was published by researchers at IIT Madras and Indian Institute of Science Education and Research. Abstract: "Integration of the emerging layered materials with the existing CMOS platform is a promising solution to enhance the performance and functionalities of the future CMOS based integrated cir... » read more

Friction Between Single Layer Graphene And An Atomic Force Microscope Tip
By Technical Paper Link - 27 Sep, 2023 - Comments: 0

A technical paper titled “Dynamically tuning friction at the graphene interface using the field effect” was published by researchers at University of Illinois Urbana-Champaign and University of California Irvine. Abstract: "Dynamically controlling friction in micro- and nanoscale devices is possible using applied electrical bias between contacting surfaces, but this can also induce unwant... » read more

Directed Self-Assembly Finds Its Footing
By Gregory Haley - 17 Aug, 2023 - Comments: 0

Ten years ago, when the industry was struggling to deliver EUV lithography, directed self-assembly (DSA) roared to the forefront of research and development for virtually every manufacturer determined to extend the limits of 193i. It was the hot topic at of the 2012 SPIE Advanced Lithography Conference, with one attendee from Applied Materials comparing its potential to disrupt the industry to ... » read more

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