tag: analog

Mixed Messages Complicate Mixed-Signal
By Brian Bailey - 26 Jun, 2025 - Comments: 0

Several years ago, analog and mixed signal (AMS) content hit a wall. Its contribution to first-time chip failure doubled, and there is no evidence that anything has improved dramatically since then. Some see that the problem is likely to get worse due to issues associated with advanced nodes, while others see hope for improvement coming from AI or chiplets. Fig. 1: Cause of ASIC respins. S... » read more

Machine Intelligence on Wireless Edge Networks with RF Analog Architecture (MIT, Duke)
By Technical Paper Link - 21 Jun, 2025 - Comments: 0

A new technical paper titled "Machine Intelligence on Wireless Edge Networks" was published by researchers at MIT and Duke University. Abstract "Deep neural network (DNN) inference on power-constrained edge devices is bottlenecked by costly weight storage and data movement. We introduce MIWEN, a radio-frequency (RF) analog architecture that "disaggregates" memory by streaming weights wirele... » read more

All-In-One Analog AI Accelerator With CMO/HfOx ReRAM Integrated Into The BEOL (IBM Research-Europe)
By Technical Paper Link - 18 Jun, 2025 - Comments: 0

A new technical paper titled "All-in-One Analog AI Hardware: On-Chip Training and Inference with Conductive-Metal-Oxide/HfOx ReRAM Devices" was published by researchers at IBM Research-Europe. Abstract "Analog in-memory computing is an emerging paradigm designed to efficiently accelerate deep neural network workloads. Recent advancements have focused on either inference or training accelera... » read more

How Secure Are Analog Circuits?
By Ed Sperling - 05 Jun, 2025 - Comments: 0

The move toward multi-die assemblies and the increasing value of sensor data at the edge are beginning to focus attention and raise questions about security in analog circuits. In most SoC designs today, security is almost entirely a digital concern. Security requirements in digital circuits are well understood, particularly in large data centers and at the upper end of edge computing, which... » read more

Mobile Chip Challenges In The AI Era
By Liz Allan - 05 Jun, 2025 - Comments: 0

Leading smart phone vendors are struggling to keep pace with the rising compute and power demands of localized generative AI, standard phone functions, and the need to move more data back and forth between handsets and the cloud. In addition to edge functions, such as facial recognition and other on-device apps, phones must accommodate a continuous stream of new communications protocols, and... » read more

Optimizing Analog With Layout In The Loop
By Benjamin Prautsch - 15 May, 2025 - Comments: 0

Meeting high-performance requirements at low power isn’t easy. What is already challenging in digital is even more complex in analog. After specification and block-level system concept, the analog design flow typically spends considerable time coming up with well-working schematic-level topologies. However, once layout parasitics become apparent through parasitic extraction, the seemingly opt... » read more

Analog Creates Ripples in Digital Verification
By Brian Bailey - 24 Apr, 2025 - Comments: 0

We live in an analog world, but analog has been minimized whenever possible. At some point digital and analog must come together in every electronic device, and that has long been an area where errors creep in. The Wilson Research Group and Siemens EDA functional verification study has long shown that analog and mixed signal are two of the highest causes of flaws that result in chip respins.... » read more

GenAI for Analog IC Design (McMaster University)
By Technical Paper Link - 08 Apr, 2025 - Comments: 0

A new technical paper titled "Generative AI for Analog Integrated Circuit Design: Methodologies and Applications" was published by researchers at McMaster University. Abstract "Electronic Design Automation (EDA) in analog Integrated Circuits (ICs) has been the focus of extensive research; however, unlike its digital counterpart, it has not achieved widespread adoption. In this systematic re... » read more

The Optical Implementation of Backpropagation (Oxford, Lumai)
By Technical Paper Link - 07 Mar, 2025 - Comments: 0

A technical paper titled "Training neural networks with end-to-end optical backpropagation" was published by researchers at University of Oxford and Lumai Ltd. Abstract "Optics is an exciting route for the next generation of computing hardware for machine learning, promising several orders of magnitude enhancement in both computational speed and energy efficiency. However, reaching the full... » read more

Analog Accelerator For AI/ML Training Workloads Using Stochastic Gradient Descent (Imperial College London)
By Technical Paper Link - 24 Jan, 2025 - Comments: 0

A new technical paper titled "Learning in Log-Domain: Subthreshold Analog AI Accelerator Based on Stochastic Gradient Descent" was published by researchers at Imperial College London. Abstract "The rapid proliferation of AI models, coupled with growing demand for edge deployment, necessitates the development of AI hardware that is both high-performance and energy-efficient. In this paper, w... » read more

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