Large-Scale Integration’s Future Depends On Modeling


VLSI is a term that conjures up images of a college textbook, but some of the concepts included in very large-scale integration remain relevant and continue to evolve, while others have fallen by the wayside. The portion of VLSI that remains most relevant for semiconductor industry is "integration," which is pushing well beyond the edges of a monolithic planar chip. But that expansion also i... » read more

224G SerDes Trend and Solution


As an industry early mover to support the emerging 800G/1.6T networks, Cadence taped out the 224G-LR SerDes PHY IP on TSMC’s 3nm process at the beginning of the year and expects the silicon to arrive soon. The IP supports 1-225Gbps data rates with excellent BER at long reach (LR). The ever-increasing bandwidth requirement in hyperscale data centers is driving the rapid growth of high-speed I/... » read more

Blog Review: July 26


Siemens' Chris Spear shows how to make a group of specialized classes in SystemVerilog. Synopsys' Guy Cortez and Randy Fish consider what a silicon lifecycle management strategy looks like for SoCs deployed in HPC and data center environments. Cadence's Veena Parthan provides a primer on writing Python scripts for Fidelity, including API descriptions and different sets of packages to acce... » read more

Week In Review: Auto, Security, Pervasive Computing


The Biden-Harris Administration announced the U.S. Cyber Trust Mark, a cybersecurity certification and labeling program to help consumers choose smart devices less vulnerable to cyberattacks. The Federal Communications Commission (FCC) is applying to register the Cyber Trust Mark with the U.S. Patent and Trademark Office and it would appear on qualifying smart products, including refrigerators,... » read more

Week In Review: Design, Low Power


Cadence will acquire Rambus' SerDes and memory interface PHY IP business. Rambus will retain its digital IP business, including memory and interface controllers and security IP. “With this transaction, we will increase our focus on market-leading digital IP and chips and expand our roadmap of novel memory solutions to support the continued evolution of the data center and AI,” said Sean Fan... » read more

Getting Rid Of Heat In Chips


Power consumed by semiconductors creates heat, which must be removed from the device, but how to do this efficiently is a growing challenge. Heat is the waste product of semiconductors. It is produced when power is dissipated in devices and along wires. Power is consumed when devices switch, meaning that it is dependent upon activity, and that power is constantly being wasted by imperfect de... » read more

HBM’s Future: Necessary But Expensive


High-bandwidth memory (HBM) is becoming the memory of choice for hyperscalers, but there are still questions about its ultimate fate in the mainstream marketplace. While it’s well-established in data centers, with usage growing due to the demands of AI/ML, wider adoption is inhibited by drawbacks inherent in its basic design. On the one hand, HBM offers a compact 2.5D form factor that enables... » read more

How Do Robots Navigate?


Have you ever been amazed by the graceful movement of robots and self-driving vehicles in unfamiliar surroundings? The latest technological advancements have introduced self-cleaning robots, autonomous vehicles with incredible navigation abilities. This entails navigating through unfamiliar surroundings, capturing clear video footage, and performing processing at the edge. What's truly remarkab... » read more

Blog Review: July 19


Siemens' Keith Felton argues that co-design-driven semiconductor package planning and prototyping is critical for design success and points to how interchange formats enable designers to make trade-off decisions for both the package and the board and communicate those recommendations back to the other design team in formats that are native to their tools. Cadence's Xin Mu explains precoding ... » read more

PCIe 6.0 Electrical Testing For High Data-Bandwidth Applications


For nearly three decades, PCI Express® (PCIe®) technology has been the standard interconnect inside computers providing high bandwidth and low latency to meet customer demand. However, as the industry needs to evolve, so does the standard, keeping pace and driving future innovation. PCIe 6.0 is ubiquitous and offers power-efficient performance and high bandwidth for latency-sensitive appli... » read more

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