tag: chiplets

Multi-Die Assemblies Complicate Parasitic Extraction
By Ann Mutschler - 12 Jun, 2025 - Comments: 0

The shift from planar designs to multi-die assemblies with complex interconnects is transforming what had become almost an afterthought in the design process into a first-order challenge. Parasitics include things like inductance, capacitance, and resistance, which have become more problematic at advanced nodes due to increasing logic density, thinner interconnects and insulators, and a spik... » read more

Configurability In The Design Of Integrated Chipsets
By Expedera - 11 Jun, 2025 - Comments: 0

The semiconductor industry is experiencing significant changes as the requirements for processing data are evolving. Computing systems must manage unparallel massive amounts of data created by users, whether machines or humans. Artificial Intelligence is the mechanism by which this data gets processed, and it is driving a rethinking of the architectures of the computing systems. In conjunction ... » read more

Challenges In Using Sub-7nm ICs In Automotive
By Laura Peters - 10 Jun, 2025 - Comments: 0

The automotive industry is producing vehicles with increasing levels of real-time decision-making, enabled by thousands of ICs, sensors, and multi-chip packages, but making sure these systems work flawlessly throughout their expected lifetimes is a growing challenge. Automotive chips traditionally were developed at mature process nodes in five- to seven-year cycles, but much has changed over... » read more

How Secure Are Analog Circuits?
By Ed Sperling - 05 Jun, 2025 - Comments: 0

The move toward multi-die assemblies and the increasing value of sensor data at the edge are beginning to focus attention and raise questions about security in analog circuits. In most SoC designs today, security is almost entirely a digital concern. Security requirements in digital circuits are well understood, particularly in large data centers and at the upper end of edge computing, which... » read more

Accelerating Chiplet-Based SoC Design For AI-Defined Vehicles
By Robert Schweiger - 05 Jun, 2025 - Comments: 0

Today, we are witnessing a paradigm shift towards a more modular design approach that disaggregates SoC functions into various chiplets, each optimized for specific functionalities. Chiplets offer more modularity, which enables product scalability and customization, which is key for AI-defined vehicles, the next generation of software-defined vehicles (SDVs). Cadence’s Helium Virtual and H... » read more

Connecting AI Accelerators
By Ann Mutschler - 04 Jun, 2025 - Comments: 0

Experts At The Table: Semiconductor Engineering sat down to discuss the various ways that AI accelerators are being applied today with Marc Meunier, director of ecosystem development at Arm; Jason Lawley, director of product marketing for AI IP at Cadence; Paul Karazuba, vice president of marketing at Expedera; Alexander Petr, senior director at Keysight; Steve Roddy, chief marketing office... » read more

Mastering Chiplet Design
By Michelle Clancy Fuller - 03 Jun, 2025 - Comments: 0

The semiconductor industry is undergoing a fundamental shift from monolithic chip designs to chiplet-based architectures. This modular approach promises enhanced performance, cost efficiency, and scalability, but it also brings unique system-level verification challenges that design teams must overcome. Chiplet systems break different functions into smaller, separate dies, improving yield an... » read more

Accelerating Scalable Computing
By Shivi Arora - 02 Jun, 2025 - Comments: 0

By Shivi Arora and Sue Hung Fung As computing demands for HPC, AI/ML, and cloud infrastructure grow, modular architectures are replacing traditional monolithic System-on-Chip (SoC) designs. These legacy designs are increasingly expensive and difficult to scale due to ever-increasing silicon complexity. In response, the industry is embracing chiplet-based System-in-Package (SiP) solutions,... » read more

Optimizing Data Movement
By Ann Mutschler - 29 May, 2025 - Comments: 1

Demand for new and better AI models is creating an insatiable demand for more processing power and much better data throughput, but it's also creating a slew of new challenges for which there are not always good solutions. The key here is figuring out where bottlenecks might crop up in complex chips and advanced packages. This involves a clear understanding of how much bandwidth is required ... » read more

Executive Outlook: Chiplets, 3D-ICs, and AI
By Ed Sperling - 29 May, 2025 - Comments: 0

Semiconductor Engineering sat down to discuss chiplets and the challenges of moving to 3D-ICs with Bill Mullen, Ansys fellow; John Ferguson, senior director of product management at Siemens EDA; Chris Mueth, senior director of new markets and strategic initiatives at Keysight; Albert Zeng, senior engineering group director at Cadence; Anand Thiruvengadam, senior director and head of AI product ... » read more

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