Reflecting On The SPIE Advanced Lithography + Patterning Symposium 2025


The mood at this year’s SPIE Advanced Lithography + Patterning Symposium was decidedly upbeat. The outlook for business is good, due in large measure to expectations of high demand for chips, driven by artificial intelligence (AI). To realize the potential of AI, increases in chip performance and efficiency are needed, which, in turn, requires advanced patterning. In the Symposium’s technic... » read more

Many Options For EUV Photoresists, No Clear Winner


In EUV lithography, and especially high-numerical-aperture EUV, balancing tradeoffs between resolution, sensitivity and line-width roughness is becoming increasingly difficult. Lithography patterning using extreme UV exposure depends on a resist mask that can simultaneously meet targets of small feature resolution, high sensitivity to EUV wavelength, and acceptable linewidth roughness. Unfor... » read more

EUV’s Future Looks Even Brighter


The rapidly increasing demand for advanced-node chips to support everything-AI is putting pressure on the industry's ability to meet demand. The need for cutting-edge semiconductors is accelerating in applications ranging from hyperscale data centers powering large language models to edge AI in smartphones, IoT devices, and autonomous systems. But manufacturing those chips relies heavily on ... » read more

More Than Meets The Eye: Trends In Lithography


Lithography, once the exclusive domain of artists and printmakers, also lies at the heart of integrated circuit (IC) production. The process of shining light on a substrate through a photomask to control exposure has been around since the 1960s and has been the key part of improving IC fabrication process resolution. At the time, the light sources used were in the human-visible spectrum, which ... » read more

Takeaways From The 2024 SPIE Photomask Technology + EUV Conference


In the autumn, I had the opportunity to attend the 2024 SPIE Photomask Technology and EUV Lithography conferences, collectively referred to as PUV or sometimes BACUS, the latter a reference to the event’s early association with the BACUS organization. This is a key annual event that brings together experts and professionals in photomask technology and EUV lithography. This year’s conference... » read more

Luminary Panel Sees Progress In EUV Pellicle Adoption As Critical For EUV


A significant focus of the 2024 SPIE Photomask and EUV conference was on EUV lithography and high-numerical-aperture (high-NA) EUV lithography, offering the potential to drive resolution to new heights. These EUV solutions bring new challenges such as pellicles, mask inspection, and smaller and smaller minimum mask dimensions. Progress has been impressive, according to lithography luminary Dr. ... » read more

Tuning Design And Process For High-NA EUV Stitching


By Kevin Lucas and James Ban Upcoming 14A and 10A process nodes will use high-NA EUV anamorphic scanners, which will require two stitched half-fields to achieve the equivalent wafer exposure area of previous-generation scanners, see figure 1. The lithography patterning at a stitching boundary between two mask exposures will be affected by additional process variation than are encountered in ... » read more

Luminary Panel Sees Multi-Beam Mask Writers And Curvilinear Masks Key To 193i And EUV


Attendance was up and the mood was optimistic at this year’s SPIE Photomask and EUV conference held September 29 through October 3, 2024. The optimism was apparent as well for multi-beam mask writers and curvilinear masks during the eBeam Initiative’s 15th annual reception and meeting held on October 1. In the eBeam Initiative’s annual Luminaries survey, 93% of those surveyed said that pu... » read more

Research Bits: Aug. 20


EUV mirror interference lithography Researchers from the Paul Scherrer Institute developed an EUV lithography technique that can produce conductive tracks with a separation of just five nanometers by exposing the sample indirectly rather than directly. Called EUV mirror interference lithography (MIL), the technique uses two mutually coherent beams that are reflected onto the wafer by two id... » read more

Research Bits: Aug. 13


3D X-ray of chip interiors Researchers from the Paul Scherrer Institute, EPFL Lausanne, ETH Zurich, and the University of Southern California used X-rays to take non-destructive, three-dimensional images of the inside of a microchip at 4 nanometer resolution. To create the images, the researchers relied on a technique called ptychography, in which a computer combines many individual images ... » read more

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