Coming To A Fab Near You?

By Katherine Derbyshire - 21 Jan, 2016 - Comments: 1

What do Quentin Tarantino and ASML have in common? Anamorphic lenses. The optical image created by an anamorphic lens is oval, rather than round, with different magnifications along the horizontal and vertical axes. Tarantino used 65mm anamorphic lenses to film The Hateful Eight, and some theaters are also using them to screen the movie. It’s the first fiction feature to use this format s... » read more

Tech Talk: Double-Triple Patterning

By Brian Bailey - 21 Jan, 2016 - Comments: 0

Mentor Graphics' David Abercrombie shows the differences and challenges in double patterning versus triple patterning. [youtube vid= e0wZmjBbEf0] » read more

Will 5nm Happen?

By Mark LaPedus - 20 Jan, 2016 - Comments: 7

Chipmakers are ramping up their 16/14nm finFET processes, with 10nm finFETs expected to ship sometime in late 2016 or early 2017. So what’s next? The foundries can see a path to extend the finFET transistor to 7nm, but the next node, 5nm, is far from certain and may never happen. Indeed, there are several technical and economic challenges at 5nm. And even if 5nm happens, only a few compani... » read more

Reflections On 2015

By Brian Bailey - 22 Dec, 2015 - Comments: 0

It is easy to make predictions, but few people can make them with any degree of accuracy. Most of the time, those predictions are forgotten by the end of the year and there is no one to do a tally of who holds more credibility for next year. Not so with SemiEngineering. We like to hold people's feet to the fire, but while the Pants-On-Fire meter may be applicable to politicians, we like to thin... » read more

Inside Inspection And Metrology

By Mark LaPedus - 18 Dec, 2015 - Comments: 0

Semiconductor Engineering sat down to talk about inspection, metrology and other issues with Mehdi Vaez-Iravani, vice president of advanced imaging technologies at Applied Materials. What follows are excerpts of that conversation. SE: Today, the industry is working on a new range of complex architectures, such as 3D NAND and finFETs. For these technologies, the industry is clearly struggling... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 18 Dec, 2015 - Comments: 1

Samsung plans to make a major entry into the drone market, according to reports. “Samsung is not alone in focusing on the drone market,” said Will Strauss, president of Forward Concepts, in a research note. “At CES next month in Las Vegas, one can expect new products from drone market leader DJI, but dozens of new drone models from Parrot and many other companies. Even GoPro chip maker A... » read more

Foundries Face Challenges in 2016

By Mark LaPedus - 17 Dec, 2015 - Comments: 2

Generally, 2015 has been a challenging year in the foundry business. For one thing, the foundry industry will register modest growth in 2015. In addition, the foundry customer base is consolidating. And on the leading edge, foundries took longer than expected to ramp up their 16nm/14nm finFET processes. So, after an eventful year in 2015, what’s in store for the foundry business in 2016? I... » read more

The Next Resists…Continued

By Katherine Derbyshire - 17 Dec, 2015 - Comments: 1

As previously discussed, conventional chemically-amplified resists are struggling to balance the competing requirements of EUV lithography. Simultaneously meeting the industry’s targets for resolution, sensitivity, and line-edge roughness may require new resist concepts. Inpria’s resist technology, based on tin-oxide nano clusters, is one possibility. Recently published work at SUNY Albany ... » read more

Manufacturing Bits: Dec. 15

By Mark LaPedus - 15 Dec, 2015 - Comments: 0

DRAM scaling sans EUV At the recent IEEE International Electron Devices Meeting (IEDM) in Washington, D.C., chipmakers presented papers on several technologies, including one unlikely topic—DRAM scaling. For years, it was believed that DRAMs would hit the wall and stop scaling at 20nm or so. Then, at that point, the industry would need to migrate to a 3D DRAM structure or a next-generatio... » read more

The Pain Of Change

By Ed Sperling - 24 Nov, 2015 - Comments: 0

If the still evolving shift left has taught the semiconductor industry anything, it's that nothing can be counted on to stay the same for very long. The basic proposition of doing more earlier in the design cycle to speed up time to market—and thereby shifting everything left in the linear flow—means that every silo that has been constructed over the past several decades needs to be rethoug... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?