tag: FPGA

Chip Design Is Getting Squishy
By Ed Sperling - 27 Feb, 2020 - Comments: 0

So many variables, uncertainties and new approaches are in play today across the chip industry today that previous rules are looking rather dated. In the past, a handful of large companies or organizations set the rules for the industry and established an industry roadmap. No such roadmap exists today. And while there are efforts underway to create new roadmaps for different industries, inte... » read more

The Challenges Of Building Inferencing Chips
By Ann Mutschler - 27 Feb, 2020 - Comments: 0

Putting a trained algorithm to work in the field is creating a frenzy of activity across the chip world, spurring designs that range from purpose-built specialty processors and accelerators to more generalized extensions of existing and silicon-proven technologies. What's clear so far is that no single chip architecture has been deemed the go-to solution for inferencing. Machine learning is ... » read more

The Cost Of Programmability
By Brian Bailey - 27 Feb, 2020 - Comments: 1

Nothing comes for free, and that is certainly true for the programmable elements in an SoC. But without them we are left with very specific devices that can only be used for one fixed application and cannot be updated. Few complex devices are created that do not have many layers of programmability, but the sizing of those capabilities is becoming more important than in the past. There are... » read more

Hybrid Prototyping
By Ed Sperling - 26 Feb, 2020 - Comments: 1

David Svensson, applications engineer in Synopsys’ Verification Group, explains how a virtual transaction logic model can be connected to develop hardware-dependent drivers before RTL actually exists, why this is now critical for large, complex designs, and how to find the potential bottlenecks and debug both software and hardware. » read more

Divided On System Partitioning
By Brian Bailey - 30 Jan, 2020 - Comments: 0

Building an optimal implementation of a system using a functional description has been an industry goal for a long time, but it has proven to be much more difficult than it sounds. The general idea is to take software designed to run on a processor and to improve performance using various types of alternative hardware. That performance can be specified in various ways and for specific applic... » read more

What Worked, What Didn’t In 2019
By Brian Bailey - 19 Dec, 2019 - Comments: 1

2019 has been a tough year for semiconductor companies from a revenue standpoint, especially for memory companies. On the other hand, the EDA industry has seen another robust growth year. A significant portion of this disparity can be attributed to the number of emerging technology areas for semiconductors, none of which has reached volume production yet. Some markets continue to struggle, a... » read more

Eight Benefits Of Using An FPGA With An On-Chip High-Speed Network
By Achronix - 04 Dec, 2019 - Comments: 0

Since the initial introduction of FPGAs decades ago, each new architecture has continued to employ a bit-wise routing structure. While this approach has been successful, the rise of high-speed communication standards has required ever increasing on-chip bus widths to be able to support these new data rates. A consequence of this limitation is that designers often spend much of their development... » read more

Using FPGAs For AI
By Brian Bailey - 02 Dec, 2019 - Comments: 3

Artificial intelligence (AI) and machine learning (ML) are progressing at a rate that is outstripping Moore's Law. In fact, they now are evolving faster than silicon can be designed. The industry is looking at all possibilities to provide devices that have the necessary accuracy and performance, as well as a power budget that can be sustained. FPGAs are promising, but they also have some sig... » read more

Week In Review: Design, Low Power
By Jesse Allen - 29 Nov, 2019 - Comments: 0

Aldec launched the HES-MPF500-M2S150 Development Kit for early co-development and co-verification of hardware and software for FPGA-based embedded systems that will use devices from either or both of Microchip’s PolarFire or SmartFusion2 families. The HES-MPF500-M2S150 Development Kit features Microchip’s low power PolarFire MPF500T FCG1152 FPGA, which has 481k logic elements, 1480 math blo... » read more

Accelerating Financial Applications With SLX FPGA
By Silexica - 25 Nov, 2019 - Comments: 0

This white paper demonstrates how engineers creating FPGA-based hardware accelerators for financial market models can take advantage of SLX FPGA. SLX FPGA can be used to accelerate optimization efforts for financial market models targeting option pricing. In this paper, two implementations of computation intensive models for pricing options are discussed, namely the Black-Scholes and Heston pri... » read more

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