To Emulate Or Prototype?


FPGA Prototyping is more challenging than emulation. Yet for the time invested in prototype setup, developers are rewarded with a validation platform that is capable of running orders of magnitude faster than emulation. Emulation also has  benefits that appeal especially to design verification engineers. Aside from the completely automated compilation and setup flow, it offers robust debugg... » read more

Executive Insight: Raik Brinkmann


[getperson id="11306" comment="Raik Brinkmann"], president and CEO of [getentity id="22395" e_name="OneSpin Solutions"], sat down with Semiconductor Engineering to discuss where and why formal verification is gaining traction, and how it fits alongside other verification approaches. What follows are excerpts of that conversation. SE: [getkc id="33" kc_name="Formal"] has been around for a whi... » read more

Will Open-Source Work For Chips?


Open source is getting a second look by the semiconductor industry, driven by the high cost of design at complex nodes along with fragmentation in end markets, which increasingly means that one size or approach no longer fits all. The open source movement, as we know it today, started in the 1980s with the launch of the GNU project, which was about the time the electronic design automation (... » read more

Performance First


Crank up the clock speed. It takes a lot more performance to run virtual reality smoothly, or to process data in the cloud, or to stream a high-definition video from a drone. And none of that compares to the amount of performance required to kill an array of disturbingly realistic zombies on a mobile device in conjunction with other players scattered around the globe. After several years of ... » read more

CPU, GPU, or FPGA?


Nvidia’s new GeForce GTX 1080 gaming graphics card is a piece of work. Employing the company’s Pascal architecture and featuring chips made with a 16nm [getkc id="185" kc_name="finFET"] process, the GTX 1080’s GP104 graphics processing units boast 7.2 billion transistors, running at 1.6 GHz, and it can be overclocked to 1.733 GHz. The die size is 314 mm², 21% smaller than its GeForce ... » read more

Valtrix Pushes For Horizontal Verification Reuse


Some of the most significant advances are not the result of a single person or a single idea. They often don’t happen overnight, and are suggested by a change that slowly becomes pervasive enough to become a generalized solution. That is exactly what is happening right now in the area of functional verification. The tools and methodologies in place at the moment assumed designs typical of the... » read more

How Many Cores? (Part 2)


New chip architectures and new packaging options—including fan-outs and 2.5D—are changing basic design considerations for how many cores are needed, what they are used for, and how to solve some increasingly troublesome bottlenecks. As reported in part one, just adding more cores doesn't necessarily improve performance, and adding the wrong size or kinds of cores wastes power. That has s... » read more

Power/Performance Bits: March 8


Configurable analog chip Researchers at Georgia Tech built a new configurable computing device, the Field-Programmable Analog Array (FPAA) SoC, that uses analog technology supported by digital components and can be built up to a hundred times smaller while using a thousand times less electrical power than comparable digital floating-gate configurable devices. Professionals familiar with F... » read more

Securing The Cloud


Cloud computing offers on-demand network access that is ubiquitous and convenient, with a pool of configurable computing resources such as shared networks, servers, storage, applications, and services. What makes this so attractive is these services can be provisioned and adapted to the load, with minimal management or service provider intervention. Cloud computing takes advantage of a distr... » read more

Managing Validation And Verification Abstract Activities For DO-254


This paper provides an overview of the Validation and Verification (V & V) process and its associated activities as described in RTCA/DO-254. With the growing size and complexity of today’s FPGAs, managing V & V activities is becoming difficult and time-consuming. This paper presents a list of recommended features, methodologies and capabilities that must be supported by a tool to manage V & ... » read more

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