Chip Industry Technical Paper Roundup: Mar. 10


New technical papers recently added to Semiconductor Engineering’s library: [table id=412 /] Find more semiconductor research papers here. » read more

Thermally Aware Chiplet Placement Algorithm Based on Automatic Differentiation (MIT, IBM)


A new technical paper titled "DiffChip: Thermally Aware Chip Placement with Automatic Differentiation" was published by researchers at MIT and IBM. Abstract "Chiplets are modular integrated circuits that can be combined to form a larger system, offering flexibility and performance enhancements. However, their dense packing often leads to significant thermal management challenges, requiring ... » read more

Lines Blurring Between Supercomputing And HPC


Supercomputers and high-performance computers are becoming increasingly difficult to differentiate due to the proliferation of AI, which is driving huge performance increases in commercial and scientific applications and raising similar challenges for both. While the goals of supercomputing and high-performance computing (HPC) have always been similar — blazing fast processing — the mark... » read more

Chip Industry Week In Review


Chinese startup DeepSeek rattled the tech world and U.S. stock market with claims it spent just $5.6 million on compute power for its AI model compared to its billion-dollar rivals in the U.S. The announcement raised questions about U.S. investment strategies in AI infrastructure and led to an initial $600 billion selloff of NVIDIA stock. Since its launch, DeepSeek reportedly was hit by malicio... » read more

Chip Industry Technical Paper Roundup: Jan. 28


New technical papers recently added to Semiconductor Engineering’s library: [table id=400 /] Find all technical papers here. » read more

SRAM With Mixed Signal Logic With Noise Immunity in 3nm Nanosheet (IBM)


A new technical paper titled "SRAM and Mixed-Signal Logic With Noise Immunity in 3nm Nano-Sheet Technology" was published by researchers at IBM T. J. Watson Research Center and IBM. Abstract "A modular 4.26Mb SRAM based on a 82Kb/block structure with mixed signal logic is fabricated, characterized, and demonstrated with full functionality in a 3nm nanosheet (NS) technology. Designed macros ... » read more

Chip Industry Technical Paper Roundup: Jan. 7


New technical papers recently added to Semiconductor Engineering’s library: [table id=395 /] Find all technical papers here. » read more

Chip Industry Week in Review


Lawrence Livermore National Laboratory is ramping up R&D for next-gen EUV and plasma-based particle sources, aiming to increase the EUV laser source power by an order of magnitude while also making it more energy-efficient. Specifically, the goal is to replace today's CO2-based laser with a solid-state laser, using a thulium-doped yttrium lithium fluoride medium to increase the laser's powe... » read more

Co-Packaged Optics To Train/Run GenAI Models in Data Centers (IBM)


A new technical paper titled "Next generation Co-Packaged Optics Technology to Train & Run Generative AI Models in Data Centers and Other Computing Applications" was published by researchers at IBM. Abstract "We report on the successful design and fabrication of optical modules using a 50 micron pitch polymer waveguide interface, integrated for low loss, high density optical data transf... » read more

Chip Industry Week In Review


Updated for 12/20 government fundings and 12/23 for China trade investigation announcements. President Biden announced a trade investigation into "China's unfair trade practices in the semiconductor sector."  The announcement stated "PRC semiconductors often enter the U.S. market as a component of finished goods. This Section 301 investigation will examine a broad range of the PRC’s non-m... » read more

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