tag: IP

More Than Random: Achieving Systematic ASIL D ISO 26262 Compliance For Automotive SoCs
By Ron DiGiuseppe - 04 Aug, 2022 - Comments: 0

Automakers are upgrading vehicle autonomy levels from Level2 Advanced Driving Assistance Systems (ADAS) to Level 2+ and Level 3 and evolving to full Highly Automated Driving (HAD) Level 4 and Level 5 with new safety critical applications. The new applications such as automatic emergency braking, lane keep aid, traffic sign recognition, surround view, drowsiness monitoring, and others improve sa... » read more

Customizing Processors
By Brian Bailey - 28 Jul, 2022 - Comments: 1

The design, verification, and implementation of a processor is the core competence of some companies, but others just want to whip up a small processor as quickly and cheaply as possible. What tools and options exist? Processors range from very small, simple cores that are deeply embedded into products to those operating at the highest possible clock speeds and throughputs in data centers. I... » read more

Security Risks Widen With Commercial Chiplets
By Ed Sperling - 07 Jul, 2022 - Comments: 0

The commercialization of chiplets is expected to increase the number and breadth of attack surfaces in electronic systems, making it harder to keep track of all the hardened IP jammed into a package and to verify its authenticity and robustness against hackers. Until now this has been largely a non-issue, because the only companies using chiplets today — AMD, Intel, and Marvell — interna... » read more

Time For FMEDA Reuse?
By Stefano Lorenzini - 07 Jul, 2022 - Comments: 0

How do designers quantify safety in electronic systems? Through one or more tables called Failure Modes, Effects and Diagnostic Analysis – FMEDA. In fact, an FMEDA does not have to be a table; it could be manifested in scripts or some other form, but a table is the easiest way to think of this information. Think of an FMEDA for an IP, as the concept extends easily to a system-on-chip (SoC). T... » read more

EDA Gaps At The Leading Edge
By Ed Sperling - 29 Jun, 2022 - Comments: 1

Semiconductor Engineering sat down to discuss why new approaches are required for heterogeneous designs, with Bari Biswas, senior vice president for the Silicon Realization Group at Synopsys; John Lee, general manager and vice president of the Ansys Semiconductor business unit; Michael Jackson, corporate vice president for R&D at Cadence; Prashant Varshney, head of product for Microsoft Azu... » read more

A New Breed Of EDA Required
By Brian Bailey - 23 Jun, 2022 - Comments: 1

While doing research for one of my stories this month, a couple of people basically said that applying methodologies of the past to the designs of today can be problematic because there are fundamental differences in the architectures and workloads. While I completely agree, I don't think these statements go far enough. Designs of today generally have one of everything — one CPU, one accel... » read more

Traceability Is Not My Problem (Is It?)
By Paul Graykowski - 21 Jun, 2022 - Comments: 0

What is all the fuss about traceability? If it is that important, should it be handled by a compliance group? Delegating to a separate team would be the preference for most design and verification team members, but it is not possible in this case. Traceability stops short of a big brother organization constantly looking over the shoulders of the development team. The more reasonable approach is... » read more

IP Industry Transformation
By Brian Bailey - 09 Jun, 2022 - Comments: 0

The design IP industry is developing an assortment of new options and licensing schemes that could affect everything from how semiconductor companies collaborate to how ICs are designed, packaged, and brought to market. The IP market already has witnessed a sweeping shift from a "design once, use everywhere" approach, to an "architect once, customize everywhere" model, in which IP is highly ... » read more

Who Benefits From Chiplets, And When
By Ed Sperling - 31 May, 2022 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss new packaging approaches and integration issues with Anirudh Devgan, president and CEO of Cadence; Joseph Sawicki, executive vice president of Siemens EDA; Niels Faché, vice president and general manager at Keysight; Simon Segars, advisor at Arm; and Aki Fujimura, chairman and CEO of D2S. This discussion was held in front of a... » read more

Bridging IC Design, Manufacturing, And In-Field Reliability
By Ed Sperling - 18 May, 2022 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about silicon lifecycle management and how that can potentially glue together design, manufacturing, and devices in the field, with Prashant Goteti, principal engineer at Intel; Rob Aitken, R&D fellow at Arm; Zoe Conroy, principal hardware engineer at Cisco; Subhasish Mitra, professor of electrical engineering and computer sci... » read more

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