tag: MIT

Flexible-Wafer Platform And CMOS-Compatible 300mm Wafer-Scale Integrated-Photonics Fabrication
By Technical Paper Link - 03 Aug, 2024 - Comments: 0

A new technical paper titled "Mechanically-flexible wafer-scale integrated-photonics fabrication platform" was published by researchers at MIT and New York Center for Research, Economic Advancement, Technology, Engineering, and Science (NY CREATES). Abstract "The field of integrated photonics has advanced rapidly due to wafer-scale fabrication, with integrated-photonics platforms and fabric... » read more

Chip Industry Week in Review
By The SE Staff - 02 Aug, 2024 - Comments: 0

Okinawa Institute of Science and Technology proposed a new EUV litho technology using only four reflective mirrors and a new method of illumination optics that it claims will use 1/10 the power and cost half as much as existing EUV technology from ASML. Applied Materials may not receive expected U.S. funding to build a $4 billion research facility in Sunnyvale, CA, due to internal government... » read more

Formal Verification of Security Properties On RTL Designs
By Technical Paper Link - 27 Jul, 2024 - Comments: 0

A technical paper titled “RTL Verification for Secure Speculation Using Contract Shadow Logic” was published by researchers at Princeton University, MIT CSAIL, and EPFL. Abstract: "Modern out-of-order processors face speculative execution attacks. Despite various proposed software and hardware mitigations to prevent such attacks, new attacks keep arising from unknown vulnerabilities. Thus... » read more

Chip Industry Week In Review
By The SE Staff - 26 Jul, 2024 - Comments: 0

The U.S. Department of Commerce and Amkor Technology signed a deal to provide up to $400 million in funding, under the CHIPS and Science Act, to build a previously announced end-to-end advanced packaging plant. The combined funding is expected to total about $2 billion. The new facility will add some 2,000 jobs in Peoria, Arizona. The SK hynix Board approved its Yongin Semiconductor Cluster... » read more

Floor-Planning Evolves Into The Chiplet Era
By Karen Heyman - 25 Jul, 2024 - Comments: 0

3D-ICs and heterogeneous chiplets will require significant changes in physical layout tools, where the placement of chiplets and routing of signals can have a big impact on overall system performance and reliability. EDA vendors are well aware of the issues and working on solutions. Top on the list of challenges for 3D-ICs is thermal dissipation. Logic typically generates the most heat, and ... » read more

Chip Industry Week In Review
By The SE Staff - 19 Jul, 2024 - Comments: 0

The University of Texas at Austin’s Texas Institute for Electronics (TIE) was awarded $840 million to establish a Department of Defense microelectronics manufacturing center. This center will focus on developing advanced semiconductor microsystems to enhance U.S. defense systems. The project is part of DARPA's NGMM Program. The U.S. Dept. of Commerce announced preliminary terms with Global... » read more

Chip Industry Week In Review
By The SE Staff - 03 Jul, 2024 - Comments: 0

Early version due to U.S. holiday. The U.S. government announced a new $504 million funding round for 12 Regional Technology and Innovation Hubs (Tech Hubs) for semiconductors, clean energy, biotechnology, AI, quantum computing, and more. Among the recipients: NY SMART I-Corridor Tech Hub (New York): $40 million for semiconductor manufacturing; Headwaters Hub (Montana): $41 million f... » read more

Chip Industry Technical Paper Roundup: June 18
By Linda Christensen - 18 Jun, 2024 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=234 /] More ReadingTechnical Paper Library home » read more

Chip Industry Week In Review
By The SE Staff - 14 Jun, 2024 - Comments: 0

Samsung unveiled its latest 2nm and 4nm process nodes, plus its AI solutions during the Samsung Foundry Forum. The company also introduced an aggressive roadmap for the next few years that includes 3D-ICs with logic-on-logic, starting in 2025; custom HBM with built-in logic; backside power delivery on 2nm technology in 2027; and co-packaged optics. In presentations at the event, the company als... » read more

KAN: Kolmogorov Arnold Networks: An Alternative To MLPs (MIT, CalTech, et al.)
By Technical Paper Link - 13 Jun, 2024 - Comments: 0

A new technical paper titled "KAN: Kolmogorov-Arnold Networks" was published by researchers at MIT, CalTech, Northeastern University and The NSF Institute for Artificial Intelligence and Fundamental Interactions. Abstract: "Inspired by the Kolmogorov-Arnold representation theorem, we propose Kolmogorov-Arnold Networks (KANs) as promising alternatives to Multi-Layer Perceptrons (MLPs). While... » read more

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