tag: memory

More Data, More Memory-Scaling Problems
By Bryon Moyer - 14 Jan, 2021 - Comments: 0

Memories of all types are facing pressures as demands grow for greater capacity, lower cost, faster speeds, and lower power to handle the onslaught of new data being generated daily. Whether it's well-established memory types or novel approaches, continued work is required to keep scaling moving forward as our need for memory grows at an accelerating pace. “Data is the new economy of this ... » read more

Five Key Changes Coming With DDR5 DIMMs
By John Eble - 14 Jan, 2021 - Comments: 0

On July 14th of last year, JEDEC announced the publication of the DDR5 SDRAM standard. This signaled the nearing industry transition to DDR5 server dual-inline memory modules (DIMM). DDR5 memory brings a number of key enhancements that will bring great performance and power benefits in next generation servers. Scaling Data Rates to 6.4 Gb/s You can never have enough memory bandwidth, and DD... » read more

Process Window Optimization Of DRAM By Virtual Fabrication
By Daebin Yim - 21 Dec, 2020 - Comments: 0

New integration and patterning schemes used in 3D memory and logic devices have created manufacturing and yield challenges. Industrial focus has shifted from the scaling of predictable unit processes in 2D structures to the more challenging full integration of complex 3D structures. Conventional 2D layout DRC, offline wafer metrology, and offline electrical measurements are no longer sufficient... » read more

What Designers Need to Know About Error Correction Code (ECC) In DDR Memories
By Vadhiraj Sankaranarayanan - 10 Dec, 2020 - Comments: 2

As with any electronic system, errors in the memory subsystem are possible due to design failures/defects or electrical noise in any one of the components. These errors are classified as either hard-errors (caused by design failures) or soft-errors (caused by system noise or memory array bit flips due to alpha particles, etc.). To handle these memory errors during runtime, the memory subsyst... » read more

Pushing The Envelope With HBM2E Memory
By Joseph Rodriguez - 10 Dec, 2020 - Comments: 0

In September, Rambus announced the achievement of reaching 4 gigabits per second (Gbps) operation with our HBM2E memory interface. This milestone was demonstrated in silicon and required mastering substantial signal integrity and power integrity (SI/PI) challenges. The 4 Gbps mark represents a 20% rise from the previous maximum data rate of 3.2 Gbps for HBM2E. To date, the industry’s faste... » read more

Tapping Into Purpose-Built Neural Network Models For Even Bigger Efficiency Gains
By Quenton Hall - 09 Dec, 2020 - Comments: 0

Neural networks can be categorized as a set of algorithms modelled loosely after the human brain that can ‘learn’ by incorporating new data. Indeed, many benefits can be derived from developing purpose-built “computationally efficient” neural network models. However, to ensure your model is effective, there are several key requirements that need to be considered. One critical conside... » read more

Startup Funding: November 2020
By Jesse Allen - 02 Dec, 2020 - Comments: 0

Numerous chipmakers pulled in funding in November 2020, with investors putting money into interconnects, memories, AI hardware, and quantum computing. Launching from stealth was a startup aiming to combine AI and 5G. Autonomous delivery did well, too, with one company raising a massive $500M. This month, we take a look at 28 companies that raised a collective $1.1B. Semi & design Connec... » read more

Impact Of Instruction Memory On Processor PPA
By Roddy Urquhart - 24 Nov, 2020 - Comments: 0

The area of any part of a design contributes both to the silicon cost and to the power consumption. A simplistic following of the “A” in a processor IP vendor’s PPA numbers can be misleading. A processor is never in isolation but is part of a subsystem additionally including instruction memory, data memory, and peripherals. In most cases, instruction memory will be dominant and the proc... » read more

Upturn Seen For Silicon Wafer Market
By Mark LaPedus - 19 Nov, 2020 - Comments: 0

After a downturn in 2019, the silicon wafer market is expected to rebound in 2020. 2021 looks even better for silicon wafers. Silicon wafers are a fundamental part of the semiconductor business. Every chipmaker needs to buy them in one size or another. Silicon wafer vendors produce and sell bare or raw silicon wafers to chipmakers, who in turn process them into chips. The silicon wafer ma... » read more

Dealing With Sub-Threshold Variation
By Bryon Moyer - 12 Nov, 2020 - Comments: 0

Chipmakers are pushing into sub-threshold operation in an effort to prolong battery life and reduce energy costs, adding a whole new set of challenges for design teams. While process and environmental variation long have been concerns for advanced silicon process nodes, most designs operate in the standard “super-threshold” regime. Sub-threshold designs, in contrast, have unique variatio... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy