Blog Review: Aug. 31


Mentor's Harry Foster presents the 2016 Wilson Research Group Functional Verification Study, beginning with trends in FPGA design and an investigation into the verification effort it takes. Synopsys' Viral Sharma warns that while AMBA AXI exclusive access may look simple at first glance, the possibility of different scenarios and combinations poses a challenge. Cadence's Paul McLellan loo... » read more

Context Is Everything


With consumer and industrial IoT applications, the importance of system context to IC vendors is paramount. No more are the days of developing a chip in isolation; close partnership with systems companies is de rigueur as they provide the use case data that is foundational to development of systems that work. While this makes sense in a smartphone, it’s significantly harder to achieve in a... » read more

Will Hypervisors Protect Us?


Another day, another car hacked and another report of a data breach. The lack of security built into electronic systems has made them a playground for the criminal world, and the industry must start becoming more responsive by adding increasingly sophisticated layers of protection. In this, the first of a two-part series, Semiconductor Engineering examines how hypervisors are entering the embed... » read more

Can Analog And Digital Get Along Better?


How to bridge analog and digital is getting renewed attention as the amount of analog content that needs to be processed balloons with consumer and industrial IoT applications. Solving that problem isn’t going to be easy, though. To begin with, digital designers view designs in terms of voltages. Analog designers, in contrast, look at currents. “Unless you can analyze an [getkc id="37... » read more

Putting Design Back Into DFT


Test always has been a delicate balance between cost and quality, but there are several changes happening in the industry that might cause a significant alteration in strategy. Part one of this two part series about [getkc id="47" comment="Design for Test (DFT)"] looked at changes in areas such as automotive, where built in self-test is becoming a mandated part of the design process. This co... » read more

The Rise Of Complex Debug On Heterogeneous Multicore SoCs


When projects move away from discrete development of loosely coupled systems to an integrated heterogeneous environment, elephantine debugging challenges are created. These challenges do not exist during discrete development because developers are able to design, develop, test, and optimize within the confines of their own device. But when consolidating heterogeneous systems, developers and ... » read more

FPGA Prototyping Gains Ground


FPGA technology for design prototypes is making new inroads as demands increase for better integration between hardware and software. [gettech id="31071" comment="FPGA"] prototyping, also known as physical prototyping, has been supported by all of the major EDA players for some time, and it has been considered an essential tool for the largest chipmakers, along with emulation and simulation.... » read more

UI Development And Graphics Strategies For Today’s Embedded Devices: Performance Matters!


The importance of getting your interactive graphical user interface (UI) right for the end user is absolutely critical to the success of any project. By understanding the most common occurring issues, or issues cited as the most frustrating/degrading experiences in the UI experience, and by taking a holistic view of the system across layers (OS, middleware, application) with these specific UI a... » read more

Blog Review: Aug. 24


Cadence's Christine Young relates a talk by IEEE president-elect Karen Bartleson, who stresses the need for technologists and policy makers to work together to shape the future of the Internet. In his latest video, Mentor's Colin Walls muses about creeping elegance in embedded software development. Synopsys' Michael Posner considers whether USB Type-C should replace the 3.5mm headphone ja... » read more

Device Pin-Specific Property Extraction For Layout Simulation


As we work through the sub-20 nm design space, the interactions between and effects on devices that are near each other are becoming critical factors in achieving the desired electrical performance. Accurate extraction of device pin-specific properties for modelling these effects is essential to attaining design goals. LVS extraction challenges Layout vs. schematic (LVS) comparison tools prov... » read more

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