tag: Real Intent

The Road Ahead For 2014
By Brian Bailey - 16 Jan, 2014 - Comments: 1

Semiconductor Engineering asked several thought leaders in the industry about the market drivers that are affecting their product planning operations for 2014. While almost everyone sees mobile devices continuing to be the major driver during 2014, there are some emerging areas that may start to have a larger impact. This article takes a look at some of those and the impacts they could have on ... » read more

When Is Verification Done?
By Ed Sperling - 20 Dec, 2013 - Comments: 0

Verification is becoming much more difficult at 16nm/14nm, driven by the sheer complexity of SoCs, the fact that there is much more to verify, and the impact of physical effects, which now affect what used to be exclusively the realm of functional verification. The questions these changes raise are daunting, and for many engineers rather unnerving. The whole validation, verification and debu... » read more

Industry Restructures Around Cost
By Ed Sperling - 19 Dec, 2013 - Comments: 1

Talk to any semiconductor executive these days about what’s next for their company and you’ll probably encounter the same perspective—cost will drive future design decisions. Dig a little further, however, and you’ll find no consistent strategy for reducing that cost. While the industry has three very viable solutions for improving the power and performance characteristics of SoCs—... » read more

Key Developments In 2013 And Crystal Ball Predictions For 2014
By Graham Bell - 19 Dec, 2013 - Comments: 0

There were a number of key developments in 2013 that stood out for me that I think would of interest to the Semiconductor Engineering audience:  We are now in the world of 8-core processors. Both the new Xbox One and the Sony PS4 sport 8-core AMD CPUs. And MediaTek has announced the MT6592, the first 8-core cell-phone chip that uses ARM A-7 processors running simultaneously at 2GHz. I know... » read more

Blog Review: Dec. 18
By Ed Sperling - 18 Dec, 2013 - Comments: 0

Cadence’s Brian Fuller looks back at electronics innovation this past year from the perspective of a 2012 event—with a heavy emphasis on going vertical in both chip architectures, transistors and in business. Things are looking up, sort of. Mentor’s Colin Walls finds social media is getting much more interesting. As proof, he’s joined a discussion about embedded C programming and st... » read more

Blog Review: Dec. 11
By Ed Sperling - 11 Dec, 2013 - Comments: 0

Synopsys’ Brent Gregory has developed a career growth checklist for computer science majors. They should hang this in the hallway at universities. Cadence’s Brian Fuller interviews Saar Drimer, a UK hardware engineer who has been experimenting with odd-shaped PCBs. According to Drimer, 45-degree angles aren’t always optimal. But what happens to all the expensive tools everyone has bee... » read more

The Week In Review: System-Level Design
By Ed Sperling - 06 Dec, 2013 - Comments: 0

Synopsys is closing in on the $2 billion mark, which would set a new record in EDA. The company posted strong financial results for its fiscal Q4 and fiscal 2013. For its fiscal year, revenue was $1.962 billion, up 11.7% from $1.756 billion in fiscal 2012. Net income for the year was $247.8 million, up from $182.4 million. For the most recent quarter, revenue was $504.9 million, up from $454.2 ... » read more

Blog Review: Nov. 27
By Ed Sperling - 27 Nov, 2013 - Comments: 0

Synopsys’ Brent Gregory is looking at real-world experiments to figure out which EDA software is better. Make sure to check out his stats. Cadence’s Brian Fuller interviews two Samsung engineers in a video about the image technology in smart phone cameras and just how far it’s progressed. Hint: Don’t forget to charge your phone on your next vacation. Mentor’s Colin Walls points ... » read more

The Race For Better Verification
By Graham Bell - 21 Nov, 2013 - Comments: 0

SoC verification is gearing up for renewed competition among the big vendors and verification-only companies like Real Intent. They are delivering their next-generation SoC verification suites with a focus on specific areas of concern. Clock-domain crossing, X-verification and reset optimization, SDC correctness and consistency, are some of the areas that are receiving dedicated RTL analysis us... » read more

Cracking The Tough Nut Using Formal Methods
By Brian Bailey - 21 Nov, 2013 - Comments: 1

Pranav Ashar, CTO of Real Intent, assured a packed room of researchers and practitioners of formal methods at the recent FMCAD conference: “Static verification is being used in the verification of designs. Every major chip out there is using static methods for sign-off today.” He used an analogy of cracking a nut. “There’s a right way and a wrong way and if you don’t pick the right me... » read more

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