Blog Review: April 2


Mentor’s Nazita Saye compares roadway roundabouts to networked systems. One roundabout works fine, but add in a bunch of them and you have a massive traffic jam. How many roundabouts are in your design? Cadence’s Richard Goering interviews Stan Kroliskoski, chair of the IEEE Design Automation Standards Committee, about four working groups on EDA standards and what’s ahead. Speaking ... » read more

New Approaches For Reliability


The definition of reliability hasn’t budged since the invention of the IC, but how to achieve it is starting to change. In safety-critical systems, as well as in markets such as aerospace, demands for reliability are so rigorous that they often require redundant circuitry—and for good reason. A PanAmSat malfunction in 1998 caused by tin whisker growth wiped out pagers for 45 million use... » read more

Formal Is Set To Overtake Simulation


There has been a significant psychology change in the area of formal verification over the past couple of years. It’s no longer considered a fringe technology, and it’s no longer considered difficult to use. In fact, it has become a necessary part of the verification process. Semiconductor Engineering sat down with a panel of experts to find out what caused this change and what more we c... » read more

The Week In Review: Design


Tools Synopsys rolled out a major new release of its place and route tool, the centerpiece of its physical design platform, offering up to 10X improvement in speed—a combination of 5X faster implementation and 2X larger capacity. Co-CEO Aart de Geus called it the most significant product in the company’s history. Synopsys also rolled out an AMS verification platform to accelerate regres... » read more

Getting A Handle On RTL X-Verification Challenges


The problem logic designers have with X’s is that RTL simulation is optimistic in behavior and this can hide real bugs in your design when you go to tapeout.  Some engineers point out that we have always had to deal with X’s and nothing has really changed. In fact, today’s SoC employ different power management schemes that wake-up or suspend IP.  As any designer knows, when powering ... » read more

Blog Review: March 19


ARM’s Diya Soubra has discovered an interesting term in relation to the Internet of Things: Compound Applications. Will that make the IoT more compelling? Mentor’s Colin Walls points to some less obvious reasons for choosing a processor. No. 4 on his list is particularly noteworthy. Synopsys’ Mick Posner has some thoughts about wearable computing prototypes. Check out the top pho... » read more

Blog Review: March 12


Arteris’ Kurt Shuler is sounding the alarm bell for the semiconductor industry. He observes that system OEMs are hiring their own chip engineers. Well, that should wake up someone. Danger Will Robinson. Mentor’s Colin Walls points to a festering debate in the embedded software world about priorities and openness to learning new tools and approaches. Embedded software developers are a rat... » read more

Blog Review: March 5


ARM’s Lori Kate Smith has discovered an unusual electronic billboard advertisement for shampoo on a train platform in Sweden. Watch what happens when the train goes by. Mentor’s J. VanDomelen puts a magnifying glass on the U.S. Defense budget and where the money is going. Times have changed with technology. Who needs soldiers? Cadence’s Brian Fuller interviews Mindtree CTO S. Janaki... » read more

The Week In Review: Design


Tools Cadence rolled out a new verification planning and management tool that is based on SQL, which greatly improves functionality and performance and offers multi-user, multi-engine and multi-analysis capabilities. Database technology—in this case, Structured Query Language—remains one of the very few software platforms that can harness multiple processors effectively. Synopsys unveil... » read more

Design And Verification Survey Results


Previously I have blogged about the verification surveys that Real Intent runs at tradeshows throughout the year.  We find it useful to track trends in tool needs and reveal what are the pain points designers are feeling.  I last reported to you, a year ago, in the blog article Clocks and Bugs, where I focused on clock-domain crossing (CDC) errors causing re-spins. This year, I would like ... » read more

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