Blog Review: March 19

Compound applications; hidden processor choices; unfashionable wearables; growth drivers; power-aware verification; 3D graphics; power plant engineering; IP-driven design; power grid simulation.


ARM’s Diya Soubra has discovered an interesting term in relation to the Internet of Things: Compound Applications. Will that make the IoT more compelling?

Mentor’s Colin Walls points to some less obvious reasons for choosing a processor. No. 4 on his list is particularly noteworthy.

Synopsys’ Mick Posner has some thoughts about wearable computing prototypes. Check out the top photo.

Cadence’s Richard Goering extracts some highlights from a speech by CEO Lip-Bu Tan, which cited three key growth drivers for the semiconductor market, as well as some challenges. The speech was delivered last week at CDNLive, Cadence’s user group conference.

Real Intent’s Graham Bell shares some new highlights of a survey about late-stage bugs. The big surprise is how many people get CDC design right, not wrong.

Independent blogger Guarav Jalan drills down into power-aware verification, which is becoming a bigger issue. He explains why.

ARM’s Tom Olson takes a look at OpenGL 3.1 and what it means for 3D graphics. This may seem somewhat removed from the hardware side, but given the graphics push on the mobile side it’s going to be important. Grab some coffee.

Mentor’s Mike Jensen compares engineering for an IC with engineering of a giant power plant. Nothing is simple, even if the scale is different. Good engineering is required everywhere.

Cadence’s Brian Fuller distills a speech by Imagination Technologies CEO Krishna Yarlagadda about IP-driven system design. There’s more to this than just faster time to market.

ARM’s Lori Kate Smith points to nine iconic devices over the past decade that were built on ARM cores. The list may surprise you.

And in case you missed last week’s Low Power-High Performance newsletter, here are some noteworthy blogs:

Mentor Graphics’ Marko Chew takes a deep dive into power grid simulation, including where and how it can be improved. Strap on your seatbelt.

Ansys-Apache’s Arvind Shanmugavel digs into FinFET reliability issues and what a 25% thermal density increase means for electromigration and the longevity of a chip.

Cadence’s Brian Fuller looks at the challenge of fusing together various parts of a complex design and the skills that are available today and whether there is a new job description ahead: Glue Engineer.

Atrenta’s Bernard Murphy examines a new concept called UPF-friendly RTL, and why it’s looking so promising to so many people.

Nvidia architect Barry Pangrle dissects IBM’s new Power8 chip and finds some very highly advanced on-chip voltage regulator approaches.

Executive Editor Ann Steffora Mutschler observes that no matter how much the EDA industry focuses on automating tasks, there is still lots of room for people.

Jasper’s Joe Hupcey turns a video camera and a microphone on hardware security, and whether it’s myth or reality.

Synopsys’ Mike Thompson finds that the big challenge for next-gen embedded processors is providing a significant performance boost for the same or lower power.

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