IP Tracking and Management

By Brian Bailey - 29 Nov, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss IP tracking and management with Ranjit Adhikary, VP of marketing for ClioSoft; Jim Bruister, director digital systems (since retired) at Silvaco; Marc Greenberg, product marketing group director at Cadence; and Kelvin Low, VP of Marketing at Arm. What follows are excerpts from that conversation. SE: What is the scope of the problem? What are ... » read more

IP Liability Changes Ahead?

By Ed Sperling - 08 Dec, 2016 - Comments: 0

Patent lawyers are keeping close tabs on a biotech patent infringement case that went before the Supreme Court this week because it could have a significant impact on IP content in other markets, including semiconductors. On Tuesday, attorneys for Life Technologies Corp. and Promega Corp., presented arguments before the U.S. Supreme Court involving an enzyme for amplifying DNA analysis. For ... » read more

Upcoming Hurdles For The Semiconductor Industry

By Ann Mutschler - 01 Feb, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss upcoming challenges and hurdles to overcome for the semiconductor industry with Vic Kulkarni, senior vice president and general manager, RTL Power Business at Ansys-Apache; Chris Rowen, Fellow and CTO, IP Group at Cadence; Subramani Kengeri, vice president, Global Design Solutions at GLOBALFOUNDRIES; Simon Davidmann, CEO of Imperas Software; Michael... » read more

Advanced Nodes Drive Changing EDA Requirements

By Ann Mutschler - 23 Oct, 2014 - Comments: 0

With new technical requirements of today’s bleeding edge manufacturing processes propelling the ecosystem of semiconductor foundries, EDA tool suppliers and IP developers, work is being done behind the scenes like a well-conducted orchestra to make sure customer designs can flow through a foundry when the time comes. One of the areas in the design process where new processes are felt acute... » read more

Automation Can’t Replace Human Intervention

By Ann Mutschler - 13 Mar, 2014 - Comments: 0

We work in a dynamic industry where the focus is on making it easier to design and verify semiconductor chips by automating tasks for the design engineer. There is so much emphasis on this that I wonder if it is easy to forget the value of that designer’s experience. No matter how automated a process gets, there is always the fundamental assumption that the engineer knows what is happening be... » read more

Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.

by Ed Sperling

Defining The Chiplet Socket

The industry may have started with the wrong approach for enabling a third-party chiplet ecosystem, but who will step in and fix it?

by Brian Bailey

tag: semiconductor IP

IP Tracking and Management

IP Liability Changes Ahead?

Upcoming Hurdles For The Semiconductor Industry

Advanced Nodes Drive Changing EDA Requirements

Automation Can’t Replace Human Intervention

Trending Articles

NAND Flash Targets 1,000 Layers

Testing For Thermal Issues Becomes More Difficult

Auto Chip Aging Accelerates In Hot Climates

Is In-Memory Compute Still Alive?

Top-Down Vs. Bottom-Up Chiplet Design

Knowledge Centers
Entities, people and technologies explored