tag: SoCs

It’s Time To Talk…
By Ed Sperling - 05 Dec, 2013 - Comments: 0

It’s bad enough that hardware engineers can’t explain what they do to other people outside of their world, but increasingly they can’t explain it outside of their narrow slice of an SoC. Engineers routinely introduce themselves as scientists, teachers, handymen, consultants, and occasionally even as arms dealers. The problem is that the tasks they handle are so complex and intertwined ... » read more

Experts At The Table: Debug
By Ed Sperling - 31 Oct, 2013 - Comments: 0

Semiconductor Engineering sat down with Galen Blake, senior verification engineer at Altera; Warren Stapleton, senior fellow at Advanced Micro Devices; Stephen Bailey, director of solutions marketing at Mentor Graphics; Michael Sanie, senior director of verification marketing at Synopsys. What follows are excerpts of that conversation. SE: There are separate areas being created in devices, s... » read more

Trending Back To ASICs
By Ann Mutschler - 24 Oct, 2013 - Comments: 0

True to its cyclical nature, the semiconductor industry is swinging back toward ASICs from more diversified approaches such as FPGAs. This dynamic is evident at companies such as Apple. “At one point we thought Apple was being a contrarian,” said Drew Wingard, CTO at Sonics. “Everybody else on the systems side was shedding their silicon people. The easiest counterpoint to what Apple wa... » read more

Experts At The Table: Debug
By Ed Sperling - 18 Oct, 2013 - Comments: 0

By Ed Sperling Semiconductor Engineering sat down with Galen Blake, senior verification engineer at Altera; Warren Stapleton, senior fellow at Advanced Micro Devices; Stephen Bailey, director of solutions marketing at Mentor Graphics; Michael Sanie, senior director of verification marketing at Synopsys. What follows are excerpts of that conversation. SE: The amount of IP is increasing and i... » read more

Critical Choices
By Ed Sperling - 10 Oct, 2013 - Comments: 0

There’s been a lot of talk about what’s good enough. Is 10 hours of battery life enough? If the tradeoff is between a smaller battery and extra hour of battery life, which is more important? Those kinds of discussions are at the heart of consumer electronics. Ultra-thin smart phones are more attractive than fat ones, and they’re easier to put in your pocket. But a new kind of discussio... » read more

Divide, Abstract And Conquer
By Ed Sperling - 03 May, 2013 - Comments: 0

For years, the motto among design and verification engineers has been to look at the individual pieces of a design because it’s impossible to have a single tool or even an integrated collection of tools that can debug everything. That approach isn’t changing, but the method for getting there is. The driver behind this shift is a familiar one—growing complexity. Even platforms and subsy... » read more

Modeling Errors
By Ed Sperling - 28 Feb, 2013 - Comments: 0

Raising the abstraction level in increasingly large and complex design requires proxies. In IC world, we think of them in terms of higher abstractions, but the basic premise is that you can’t focus on ever detail without losing sight of the bigger picture, so we build models that can represent those details. Done well, these models are incredibly useful. They save time, make it easier to ... » read more

Predictions, Problems And Prognosis
By Ed Sperling - 19 Dec, 2012 - Comments: 0

Never before in the long and often turbulent history of the semiconductor industry have so many problems presented themselves at each new process node. And never before have there been so many well-tested choices to resolving them. After possibly the most intensive, extensive and expensive research this industry has ever witnessed, Moore’s Law is now technologically assured down to at leas... » read more

The Growing Verification Challenge
By Ed Sperling - 28 Nov, 2012 - Comments: 0

System-Level Design talks with Charles Janac of Arteris, Frank Schirrmeister of Cadence, Venkat Iyer of Uniquify and Adnan Hamid of Breker Verification Systems about the growing difficulty of verifying complex SoCs and what lies ahead. [youtube vid=zUB4_t9teE8] » read more

New Reliability Issues
By Arvind Vel - 14 Jun, 2012 - Comments: 0

By Arvind Shanmugavel Reliability of ICs is a topic of growing concern with every technology node migration. With the onset of the 20nm process node from different foundries, reliability verification has taken center stage in design kits—and for good reason. Reliability margins have continued to decrease and have reached an inflection point at the 20nm node. The design and EDA communities ha... » read more

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