tag: Synopsys

Week In Review: Design, Low Power
By Linda Christensen - 17 Feb, 2023 - Comments: 0

It’s earnings season. Arm, Cadence, Synopsys, Siemens (consolidated), Rambus, and Renesas reported quarterly results over the past couple weeks. All posted year-over-year revenue growth, despite an overall challenging macroeconomic climate. A roundup of all the chip industry earnings reports from the past several weeks can be found here. The edge computing market is projected to jump to al... » read more

Managing Thermal-Induced Stress In Chips
By Karen Heyman - 16 Feb, 2023 - Comments: 0

At advanced nodes and in the most advanced packages, physics is no one's friend. Escalating density, smaller features, and thinner dies make it more difficult to dissipate heat, and they increase mechanical stress. On the flip side, thinner dielectrics and tighter spaces make it more difficult to insulate and protect against that heat, and in conjunction with those smaller features and higher d... » read more

Blog Review: Feb. 15
By Jesse Allen - 15 Feb, 2023 - Comments: 0

Siemens EDA's Harry Foster examines the relationship between verification maturity and non-trivial bug escapes into production, as well as whether safety critical development processes yield higher quality in terms of preventing bugs and achieving silicon success. Synopsys' Shankar Krishnamoorthy finds that the rapid progress of machine learning models is driving demand for more domain-speci... » read more

Simplifying Integration And Security In Home Networks
By Marie C. Baca - 13 Feb, 2023 - Comments: 0

An explosion of devices connected to the internet is driving vendors to implement standards that simplify the initial setup and improve security and integration with other devices, regardless of brand, network protocols, or country of origin. Farthest along in this multi-ecosystem merge is the Connectivity Standards Alliance (CSA), which today is supported by more than 500 companies, includi... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 10 Feb, 2023 - Comments: 0

General Motors (GM) made a deal with GlobalFoundries (GF) to have chips made at the U.S.-based foundry in upstate New York for GM’s key suppliers. GF will expand its production capabilities exclusively for GM’s supply chain, while GM promises to bring economies of scale through its strategy to reduce the unique types of chips needed in products. J.D. Power released its 2023 U.S. Vehicle ... » read more

Is RISC-V Ready For Supercomputing?
By Brian Bailey - 09 Feb, 2023 - Comments: 0

RISC-V processors, which until several years ago were considered auxiliary processors for specific functions, appear to be garnering support for an entirely different type of role — high-performance computing. This is still at the discussion stage. Questions remain about the software ecosystem, or whether the chips, boards, and systems are reliable enough. And there are both business and t... » read more

Chiplets Taking Root As Silicon-Proven Hard IP
By Ann Mutschler - 09 Feb, 2023 - Comments: 0

Chiplets are all the rage today, and for good reason. With the various ways to design a semiconductor-based system today, IP reuse via chiplets appears to be an effective and feasible solution, and a potentially low-cost alternative to shrinking everything to the latest process node. To enable faster time to market, common IP or technology that already has been silicon-proven can be utilized... » read more

How To Raise Reliability, Availability, And Serviceability Levels For HPC SoCs
By Charlie Matar - 09 Feb, 2023 - Comments: 0

By Charlie Matar, Rita Horner, and Pawini Mahajan While once the domain of large data centers and supercomputers, high-performance computing (HPC) has become rather ubiquitous and, in some cases, essential in our everyday lives. Because of this, reliability, availability, and serviceability, or RAS, is a concept that more HPC SoC designers should familiarize themselves with. RAS may sound... » read more

Using Machine Learning To Automate Debug Of Simulation Regression Results
By Synopsys - 08 Feb, 2023 - Comments: 0

Regression failure debug is usually a manual process wherein verification engineers debug hundreds, if not thousands of failing tests. Machine learning (ML) technologies have enabled an automated debug process that not only accelerates debug but also eliminates errors introduced by manual efforts. This white paper discusses how verification engineers can more efficiently analyze, bin, triage... » read more

Blog Review: Feb. 8
By Jesse Allen - 08 Feb, 2023 - Comments: 0

Cadence's Sanjeet Kumar points to key changes and optimizations that are done for USB3 Gen T compared to USB3 Gen X tunneling in order to minimize tunnel overhead and maximize USB3 throughput. Siemens EDA's Harry Foster considers the effectiveness of IC and ASIC verification by looking at schedule overruns, number of required spins, and classification of functional bugs. Synopsys' Chris C... » read more

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