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A Power-First Approach


It is becoming evidently clear that heat will be the limiter for the future of semiconductors. Already, large percentages of a chip are dark at any time, because if everything operated at the same time the amount of heat generated would exceed the ability of the chip and package to dissipate that energy. If we now start to contemplate stacking dies, where the ability to extract heat remains con... » read more

The Next Incarnation Of EDA


The EDA industry has incrementally addressed issues as they arise in the design of electronic systems, but is there about to be a disruption? Academia is certainly seeing that as a possibility, but not all of them see it happening for the same reason. The academic community questioned the future of EDA at the recent Design Automation Conference. Rather than EDA as we know it going away, they... » read more

Ethical Coverage


How many times have you heard statements such as, "The verification task quadruples when the design size doubles?" The implication is that every register bit that is created has doubled the state space of the design. It gives the impression that complete verification is hopeless, and because of that little progress has been made in coming up with real coverage metrics. When constrained rando... » read more

Choosing The Right Model Fidelity For Your Digital Twin


The EDA industry has advanced by leaps and bounds with innovation. Every time we approach a new technology node, many algorithms have to be re-imagined. As the late Jim Ready often pointed out to me, compared to the world of software development, these semiconductor technology changes are the hardware equivalent to what Fred Brooks, in his seminal article “No Silver Bullet—Essence and Accid... » read more

Universal Verification Methodology Running Out Of Steam


For the past decade or so, the Universal Verification Methodology (UVM) has been the de facto verification methodology supported by the entire EDA industry. But as chips become more heterogeneous, more complex, and significantly larger, UVM is running out of steam. Consensus is building that some fundamental changes are required, moving tools up a level of abstraction and making them more ag... » read more

Abstract Verification


Verification relies on a separation of concerns. Otherwise the task has no end. Sometimes we do it without thinking, but as an industry, we have never managed to fully define it such that it can become an accepted and trusted methodology. This becomes particularly true when we bring abstraction into the picture. A virtual prototype is meant to be true to behavior, but there could be timing d... » read more

The Value Of A Model


Increased talk about the Digital Twin has brought models to the forefront of the discussion. What are the right models for particular applications? What is the correct level of abstraction? Where do the models come from and how are they maintained? How does one value a model? The semiconductor industry has been reluctant to create any model that is not directly used in the development path. ... » read more

Betting Big On Discontinuity


Wally Rhines, president and CEO of Mentor, a Siemens Business, sat down with Semiconductor Engineering to talk about the booming chip industry, what's driving it, how long it will last and what changes are ahead in EDA and chip architectures. What follows are excerpts of that conversation. SE: The EDA and semiconductor industries are doing well right now. What's driving that growth? Rhine... » read more

Design Reuse Vs. Abstraction


Chip designers have been constantly searching for a hardware description language abstraction level higher than RTL for a few decades. But not everyone is moving in that direction, and there appear to be enough options available through design reuse to forestall that shift for many chipmakers. Pushing to new levels of abstraction is frequent topic of discussion in the design world, particula... » read more

Searching For A System Abstraction


Without abstraction, advances in semiconductor design would have stalled decades ago and circuits would remain about the same size as analog blocks. No new abstractions have emerged since the 1990s that have found widespread adoption. The slack was taken up by IP and reuse, but IP blocks are becoming larger and more complex. Verification by isolation is no longer a viable strategy at the system... » read more

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