tag: Advantest

Preventing Failures Before They Occur
By Bryon Moyer - 11 Jan, 2022 - Comments: 1

A decade or so ago, when MEMS sensors were in the limelight, one of the touted applications was to install them on industrial or other equipment to get an advance warning if the equipment was approaching failure. Today, in-circuit monitoring brings the same promise. Are these competing technologies? Or can they be made to work together? “Almost all advanced tool manufacturing companies ... » read more

Over-The-Air (OTA) Test Socket And Handler Integration Technology For 5G Mass Production Testing
By Advantest - 11 Jan, 2022 - Comments: 0

This paper presents the integration of socket, measurement antenna and handler for over-the-air (OTA) testing of antenna-in-package (AiP) devices using automated test equipment (ATE) for 5G applications. The design and characteristics of sockets for performing OTA testing in the radiating near field are also discussed. The paper also describes the structure of OTA handler integration using thes... » read more

Speeding Up Scan-Based Volume Diagnosis
By Bryon Moyer - 07 Dec, 2021 - Comments: 0

In the critical process known as new-product bring-up, it’s a race to get new products to yield as quickly as possible. But the interplay between increasingly complex aspects of designs and process makes it difficult to find root causes of yield issues so they can be fixed quickly. Advanced processes have very high defectivity, and learning must be fast and effective. While progress has be... » read more

HSIO Loopback Turns Challenges Into Opportunities For Test At 112 Gbps
By Dave Armstrong - 07 Dec, 2021 - Comments: 0

By Dave Armstrong and Don Thompson For both PCIe and Ethernet (IEEE 802.3,) signals are getting mighty small. With PCIe 5 reaching 32 Gbps (NRZ at 32 GBaud) and 802.3 reaching 112 Gbps (PAM4 at 56 GBaud), typical eye-mask limits are shrinking. Consequently, test requirements for high-speed I/O (HSIO) test are becoming daunting. HSIO test involves measurement of Tx eye height and width, co... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 03 Dec, 2021 - Comments: 0

Packaging and test Taiwan’s ASE--the world’s largest OSAT--has announced the proposed sale and disposal of equity interests in its subsidiaries, GAPT Holding and ASE (Kun Shan), to Wise Road Capital, a private equity firm based in China. The deal has a value of $1.46 billion. The announcement is related to four ASE assembly and test facilities in China, including Shanghai, Suzhou, Kunsh... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 12 Nov, 2021 - Comments: 0

Chipmakers AMD has rolled out its new MI200 series products, the first exascale-class GPU accelerators. Using a fan-out bridge packaging technology, the MI200 series are designed for high-performance computing (HPC) and artificial intelligence (AI) applications. The MI200 series accelerators feature a multi-die GPU architecture with 128GB of HBM2e memory. Typically, the HBM2e memory stack a... » read more

Enablers And Barriers For Connecting Diverse Data
By Anne Meixner - 09 Nov, 2021 - Comments: 0

More data is being collected at every step of the manufacturing process, raising the possibility of combining data in new ways to solve engineering problems. But this is far from simple, and combining results is not always possible. The semiconductor industry’s thirst for data has created oceans of it from the manufacturing process. In addition, semiconductor designs large and small now ha... » read more

More Errors, More Correction in Memories
By Bryon Moyer - 09 Nov, 2021 - Comments: 1

As memory bit cells of any type become smaller, bit error rates increase due to lower margins and process variation. This can be dealt with using error correction to account for and correct bit errors, but as more sophisticated error-correction codes (ECC) are used, it requires more silicon area, which in turn drives up the cost. Given this trend, the looming question is whether the cost of ... » read more

Coping With Parallel Test Site-to-Site Variation
By Anne Meixner - 09 Nov, 2021 - Comments: 1

Testing multiple devices in parallel using the same ATE results in reduced test time and lower costs, but it requires engineering finesse to make it so. Minimizing test measurement variation for each device under test (DUT) is a multi-physics problem, and it's one that is becoming more essential to resolve at each new process node and in multi-chip packages. It requires synchronization of el... » read more

Automotive Keyless Entry SoC Test Methodologies And Techniques
By Philip Brock - 09 Nov, 2021 - Comments: 0

By Philip Brock, Louis Benton, Jr., and Jonvyn Wongso Passive Entry Passive Start (PEPS) technology has become standard in the automotive market for keyless operation. A secure wireless communication system, PEPS enables you to lock and unlock the vehicle, and start and stop the vehicle without physically using the key. Electronic functionality embedded in the key fob to interact with the ve... » read more

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