tag: AFM

Navigating the Metrology Maze For GAA FETs
By Gregory Haley - 08 Aug, 2023 - Comments: 0

The chip industry is pushing the boundaries of innovation with the evolution of finFETs to gate-all-around (GAA) nanosheet transistors at the 3nm node and beyond, but it also is adding significant new metrology challenges. GAA represents a significant advancement in transistor architecture, where the gate material fully encompasses the nanosheet channel. This approach allows for the vertical... » read more

From Lab To Fab: Increasing Pressure To Fuse IC Processes
By Gregory Haley - 06 Jun, 2023 - Comments: 0

Test, metrology, and inspection are essential for both the lab and the fab, but fusing them together so that data created in one is easily transferred to the other is a massive challenge. The chip industry has been striving to bridge these separate worlds for years, but the economics, speed, and complexity of change require a new approach. The never-ending push toward smaller, better-defined... » read more

Latest Discoveries in the Mechanics of 2D Materials
By Technical Paper Link - 31 May, 2023 - Comments: 0

A new technical paper titled "Recent advances in the mechanics of 2D materials" was published by researchers at McGill University, University of Science and Technology of China, and University of Illinois. "We review significant advances in the understanding of the elastic properties, in-plane failures, fatigue performance, interfacial shear/friction, and adhesion behavior of 2D materials. I... » read more

Week In Review: Semiconductor Manufacturing, Test
By Gregory Haley - 19 May, 2023 - Comments: 0

TECHCET is forecasting semiconductor precursor revenues, both for high-ƙ metal dielectrics and low-ƙ dielectrics, will increase in the second half of 2023, rebounding from the current zero percent growth rate. Wafer start volumes are expected to rebound in 2024 with expansions in 2nm and 3nm logic devices. SEMI also predicts the global slump in semiconductor sales will end this quarter, gi... » read more

Metrology Strategies For 2nm Processes
By Laura Peters - 07 Mar, 2023 - Comments: 3

Metrology and wafer inspection processes are changing to keep up with evolving and new device applications. While fab floors still have plenty of OCD tools, ellipsometers, and CD-SEMs, new systems are taking on the increasingly 3D nature of structures and the new materials they incorporate. For instance, processes like hybrid bonding, 3D NAND flash devices, and nanosheet FETs are pushing the bo... » read more

Measuring 3D Sidewall Topography & LER for Photoresist Patterns Using Tip-Tilting AFM Technology
By Technical Paper Link - 19 Feb, 2023 - Comments: 0

A new technical paper titled "Enhancing the precision of 3D sidewall measurements of photoresist using atomic force microscopy with a tip-tilting technique" by researchers at National Metrology Institute of Japan (NMIJ) and National Institute of Advanced Industrial Science and Technology (AIST). "We have developed a technique for measuring the sidewall of the resist pattern using atomic for... » read more

Unknowns And Challenges In Advanced Packaging
By Ed Sperling - 19 Jan, 2023 - Comments: 0

Dick Otte, CEO of Promex Industries, sat down with Semiconductor Engineering to talk about unknowns in material properties, the impact on bonding, and why environmental factors are so important in complex heterogeneous packages. What follows are excerpts of that conversation. SE: Companies have been designing heterogeneous chips to take advantage of specific applications or use cases, but th... » read more

Metrology Options Increase As Device Needs Shift
By Laura Peters - 10 Jan, 2023 - Comments: 1

Semiconductor fabs are taking an ‘all hands on deck’ approach to solving tough metrology and yield management challenges, combining tools, processes, and other technologies as the chip industry transitions to nanosheet transistors on the front end and heterogenous integration on the back end. Optical and e-beam tools are being extended, while X-ray inspection is being added on a case-by-... » read more

Research Bits: Dec. 13
By Jesse Allen - 13 Dec, 2022 - Comments: 0

Electronic-photonic interface for data centers Engineers at Caltech and the University of Southampton integrated an electronic and photonic chip for high-speed communication in data centers. "There are more than 2,700 data centers in the U.S. and more than 8,000 worldwide, with towers of servers stacked on top of each other to manage the load of thousands of terabytes of data going in and o... » read more

Metrology Of Thin Resist For High NA EUVL
By Nova - 16 Nov, 2022 - Comments: 0

One of the many constrains of high numerical aperture extreme ultraviolet lithography (High NA EUVL) is related to resist thickness. In fact, one of the consequences of moving from current 0.33NA to 0.55NA (high NA) is the depth of focus (DOF) reduction. In addition, as the resist feature lines shrink down to 8nm half pitch, it is essential to limit the aspect ratio to avoid pattern collapse. T... » read more

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