Do Single-Vendor Flows Make Sense Yet?


For many years in the EDA industry, there has been talk of a complete design tool flow from a single vendor, and each of the main EDA players is capable of offering one. But whether they actually do — or should — is an interesting discussion. There are obvious pros and cons on the technical side. But it is the business and marketing issues that are really at the crux of the debate today.... » read more

It’s All In the Sequence


No project team wants a “Houston, we have a problem,” moment. And yet, they happen all too frequently, even though there could be a tool to avoid that heart-in-mouth situation. The real-life Houston moment, brought dramatically to life in the 1995 movie “Apollo 13,” occurred during what was meant to be the seventh manned mission of the NASA Apollo space program in 1970. It didn’t m... » read more

Bridging the IP Divide


IP reuse enabled greater efficiency in the creation of large, complex SoCs, but even after 20 years there are few tools to bridge the divide between the IP provider and the IP user. The problem is that there is an implicit fuzzy contract describing how the IP should be used, what capabilities it provides, and the extent of the verification that has been performed. IP vendors have been trying to... » read more

The Week In Review: Design/IoT


Standards Si2 is launching a new project to develop a new power modeling standard, focusing on estimation of power consumption more easily and more accurately throughout the design process, especially during the earliest stages. The approved specification will be contributed to the IEEE P2416 Standards Working Group for industry-wide distribution. IP Synopsys extended automotive safety... » read more

End Of Mixed Signal Engineering?


EDA companies are stepping back after years of trying to force engineers to combine analog and digital disciplines. Rather than emphasizing [getkc id="38" kc_name="mixed signal"] as a single expertise, they are building bridges and translation mechanisms between the two worlds. The moves cap more than a decade of trying to find optimal ways to pack [getkc id="37" kc_name="analog"] and digita... » read more

ESL Flow is Dead


It was 20 years ago that Gary Smith coined the term [getkc id="48" comment="Electronic System Level"] (ESL). He foresaw the next logical migration in abstraction up from the [getkc id="49" comment="Register Transfer Level"] (RTL) to something that would be capable of describing and building complex electronic systems. He also saw that the future of EDA depended upon who would control that marke... » read more

Making Way For Register Specification Software


No one gives much thought to the heating, ventilation and air conditioning registers in the house –– typically, two in each room, one for supply, the other for return. That is, until the lever in each needs to be manually adjusted to modulate the temperature to be hotter or colder, or the seasons change and the filters with them. Alas, registers in hardware design seem to have gotten the... » read more

Bridging The IP Divide


The adoption of an IP-based model has enabled designs to keep filling the available chip area while allowing design time to shrink. But there is a divide between IP providers and IP users. It is an implicit fuzzy contract about how the IP should be used, what capabilities it provides, and the extent of the verification that has been performed. IP vendors have been trying to formalize this as mu... » read more

Planes, Cars, And Lagging Standards


Automotive and aerospace standards are struggling to adapt to pervasive connectivity, increased functionality, and new packaging approaches and architectures, leaving chipmakers and systems vendors unsure about what needs to be included in future designs. Each of these markets has a reputation for being lumbering and unresponsive, in part because they deal with safety-critical issues and i... » read more

The Ultimate Shift Left


Albert Einstein defined it well: “Insanity is doing the same thing over and over again and expecting different results.” I have come across several semiconductor development teams, especially those in Fortune 500 companies, who do not have time to change their design process. They often cite various reasons such as: • Too busy with the current project. • What we have is working, so... » read more

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