Maximizing Signal Integrity: Fine-Tuning Via Impedance In HDFO Architectures


The most different aspect between a normal lamination structure and High-Density Fan-out (HDFO) is the routing scale. That aspect is also the challenge and focus of this study. At an HDFO scale, most of the electrical properties cannot be measured by instruments. Therefore, this study uses the indirect method to determine the impedance information of the via and match the impedance. Since the v... » read more

Cooling Chips Still A Top Challenge


Increasing levels of semiconductor integration means more work needs to be done in smaller spaces, which in turn generates more heat that needs to be dissipated. Managing heat dissipation in advanced node dies and in multi-die assemblies is critical to their functionality and their longevity. And while much of the focus has been on improving power efficiency, which reduces the rate of power ... » read more

New Package Solutions for Automotive Optical Sensors


This article introduces the development of a new optical ball grid array (OBGA) packaging platform designed for automotive applications, with a focus on platform development and compliance with the Automotive Electronics Council (AEC) AEC-Q100 Grade 2 reliability standard. The proposed packaging solution extends beyond traditional cavity OBGA packages, which have been primarily utilized for mic... » read more

Chip Industry Week in Review


Check out the Inside Chips podcast for our behind-the-scenes analysis. Newly proposed U.S. legislation called the Chip Security Act would use location verification tracking as a tool to help combat chip smuggling. This follows a report by the Economist that showed Taiwan exports of advanced chips to Malaysia in the first quarter has nearly reached 2024 totals, heightening concerns that China... » read more

Co-Design Optimization For PI/SI When Considering Thermal Performance


When applications become more complex, higher data rates or high frequencies are required. However, with increasing functions, more power dissipation will be generated. Furthermore, temperature is proportional to power dissipation, so electrical performance will also depend on thermal conditions. To determine how temperature impacts power integrity/signal integrity (PI/SI), electrical simulatio... » read more

Chip Industry Week In Review


[Podcast version is here.] TSMC said it will produce 30% of its leading-edge chips in Arizona when all six of its fabs are operational, a total investment of $165 billion, Axios reported. In its latest SEC filing, the foundry said it continues to add capacity in Taiwan, Arizona, Japan, and Germany. The Trump administration launched a Section 232 investigation into semiconductors and relat... » read more

Benefits And Challenges In Multi-Die Assemblies


Experts at the Table: Semiconductor Engineering sat down to discuss chiplets, hybrid bonding, and new materials with Michael Kelly, vice president of Chiplets and FCBGA Integration at Amkor; William Chen, fellow at ASE; Dick Otte, CEO of Promex Industries; and Sander Roosendaal, R&D director at Synopsys Photonics Solutions. What follows are excerpts of that discussion. To view part one of t... » read more

Need For KGD Drives Singulated Die Screening


The move to multi-die packaging is driving chipmakers to develop more cost-effective ways to ensure only known-good die are integrated into packages, because the price of failure is significantly higher than with a single die. Better methods for inspecting and testing these devices are already starting to roll out. High-throughput infrared inspection is capable of catching more sub-surface d... » read more

What’s Next In Advanced Packaging?


Experts at the Table: Semiconductor Engineering sat down to discuss 3D-IC progress and issues, photonics, and tradeoffs with different interposers and bridge technologies, with Michael Kelly, vice president of Chiplets and FCBGA Integration at Amkor; William Chen, fellow at ASE; Dick Otte, CEO of Promex Industries; and Sander Roosendaal, R&D director at Synopsys Photonics Solutions. What fo... » read more

Chip Industry Week In Review


Worldwide silicon wafer shipments declined nearly 2.7% to 12,266 million square inches in 2024, with wafer revenue contracting 6.5% to $11.5 billion, according to the SEMI Silicon Manufacturers Group. CSIS released a new report, “Critical Minerals and the Future of the U.S. Economy,” with detailed analysis and policy recommendations for building a secure mineral supply chain for semicond... » read more

← Older posts