tag: Amkor

TSV Complexity Leads To Manufacturing Bottleneck
By Laura Peters - 22 Apr, 2026 - Comments: 1

Key Takeaways: Through-silicon vias are the biggest enabler of 3D chip stacking and chip-to-PCB connections through silicon interposers. The AI boom is causing HBM and advanced assembly shortages, straining the supply chain. Optimization around etch, fill and reveal help reduce TSV cost. Through-silicon vias (TSVs) provide essential interconnects between DRAM dies inside hig... » read more

Panel-Level Packaging’s Second Wave Meets Engineering Reality
By Gregory Haley - 16 Apr, 2026 - Comments: 0

Key Takeaways Panel-level packaging is arriving not because the engineering is ready, but because wafer-level economics are breaking down. Glass improves the warpage and dimensional stability problems of organic substrates but introduces a different class of failure modes that require materials solutions, not process adjustments. The central challenges of panel-level processing are m... » read more

Meeting High-Frequency And Power Density Challenges With Flip Chip MLF Packaging
By KyungSu Kim - 16 Apr, 2026 - Comments: 0

The relentless march of semiconductor scaling continues to reshape the packaging landscape, driven by Moore’s Law and the demand for higher performance in increasingly compact form factors [1]. Over the past two decades transistor density has increased exponentially, with leading-edge processes now achieving densities exceeding 100 million transistors per square millimeter. Certain applica... » read more

Quantifying The Impact Of Gravity On Strip Warpage Across Assembly Stages
By Nathan Whitchurch - 19 Mar, 2026 - Comments: 0

The mechanical behavior of electronic packages is an important consideration at each stage of the assembly process. Many packages are assembled in strip format, making strip warpage a critical challenge for manufacturability and yield. Accurate simulations for strip warpage are an effective tool to determine what factors cause large warpages and to explore solutions before assembly. In these si... » read more

Advanced Packaging Limits Come Into Focus
By Gregory Haley - 19 Mar, 2026 - Comments: 0

Key Takeaways: Packaging is now a performance variable. Substrate, bonding, and process sequence determine what can be built at scale. Warpage underlies most advanced packaging failures and gets harder to control as package sizes grow. Every proposed solution, such as glass, panel processing, and backside power, solves one problem while creating another. Moore's Law has shif... » read more

Redefining Backside Metallization: Low‑Temperature Solutions For HDFO And S‑SWIFT Designs
By Dambi Jo - 19 Feb, 2026 - Comments: 0

As chip performance and integration continue to advance, thermal dissipation control has become increasingly critical not only at the wafer fabrication level but also in the packaging industry. For artificial intelligence (AI) and high performance computing (HPC) applications, the industry is gradually shifting toward 2.5D integration. In response to the growing demand, High-Density Fan-Out (HD... » read more

Laser Arrays May Simplify Co-Packaged Optics
By Bryon Moyer - 19 Feb, 2026 - Comments: 0

Key Takeaways Moving photonic ICs into the same package as silicon helps improve performance, but lasers remain outside. A new monolithic laser array allows hundreds of colors, each individually software-tunable New options are being turned into products, which could help commercialize CPO. The move to co-packaged optics (CPO) holds the promise of putting photonic ICs (PICs)... » read more

Chip Industry Week In Review
By The SE Staff - 13 Feb, 2026 - Comments: 0

Geopolitics U.S. lawmakers are urging tighter export controls on advanced semiconductor manufacturing equipment (SME) to China, warning existing loopholes threaten national security. "China is working to build domestic SME by exploiting access to U.S. and allied subcomponents required to produce tools," states the letter, which also says better coordination with allies is essential. The U.S.... » read more

Annual Global IC Fabs And Facilities Report
By Liz Allan - 07 Jan, 2026 - Comments: 0

Semiconductor companies announced a significant number of facilities in 2025 as global onshoring efforts continued across manufacturing, materials, packaging, design, and R&D. Investments came from both industry and government sources. Organizations worked together to solve current technology challenges, including soaring demand for AI chips and advanced memory, as well as complex applic... » read more

Unlocking Next-Gen Thermal Management: Why Indium-Based Metal TIMs Are Game-Changers
By JinSeon Min - 18 Dec, 2025 - Comments: 0

As electronic devices become more powerful and compact, thermal management has become one of the most critical challenges in advanced electronic packaging. High-performance processors used in AI computing, data centers, and 5G/6G infrastructure generate significant heat, and failure to dissipate effectively can lead to reduced performance, reliability issues, and even catastrophic component fai... » read more

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