Money Pours Into New Fabs And Facilities


Fabs, packaging, test and assembly, and R&D all drew major funding in 2023. Companies poured money into offshore locations, such as India and Malaysia, to access a larger workforce and lower costs, while also partnering with governments to secure domestic supply chains amid ongoing geopolitical turmoil. Looking ahead, artificial intelligence (AI), quantum computing, and data applications... » read more

Top Tech Videos of 2023


In 2023, heterogeneous integration, RISC-V, and advanced node logic scaling and advanced packaging dominated the semiconductor industry. All of those topics spurred deep discussions at conferences, and they were the subject of Semiconductor Engineering's most popular videos. Of the videos published in 2023, here are the highlights from our five channels: Manufacturing, Packaging & Mater... » read more

Proprietary Vs. Commercial Chiplets


Large chipmakers are focusing on chiplets as the best path forward for integrating more functions into electronic devices. The challenge now is how to pull the rest of the chip industry along, creating a marketplace for third-party chiplets that can be chosen from a menu using specific criteria that can speed time to market, help to control costs, and behave as reliably as chiplets developed in... » read more

High Performance, Multi-Chip Leadframe Package With Internal Connections


For high performance applications, demand for highly integrated packages has increased. This is due to the highly integrated package’s electrical performance advantages of reduction of interchip distance (delay), high density I/O counts for multi-function and small form factor [1-3]. With the increasing importance of highly integrated packages, the need for improved thermal management is also... » read more

Chip Industry Week In Review


By Jesse Allen, Gregory Haley, and Liz Allan Synopsys acquired Imperas, pushing further into the RISC-V world with Imperas' virtual platform technology for verifying and emulating processors. Synopsys has been building up its RISC-V portfolio, starting with ARC-V processor IP and a full suite of tools introduced last month. The first high-NA EUV R&D center in the U.S. will be built at... » read more

Fingerprinting Chips For Traceability


Semiconductor components increasingly require unclonable and tamper resistant identifiers, which are especially necessary as devices become increasingly heterogeneous collections of chiplets and subsystems. These fingerprints provide traceability, which contributes to process improvements and yield learning and enable tracking for a tightly managed supply chain. While some of this technology... » read more

Chip Industry Week In Review


By Susan Rambo, Gregory Haley, and Liz Allan Amkor plans to invest about $2 billion in a new advanced packaging and test facility in Peoria, Arizona. When finished, it will employ about 2,000 people and will be the largest outsourced advanced packaging facility in the U.S. The first phase of the construction is expected to be completed and operational within two to three years. Synopsys p... » read more

Big Shifts In Power Electronics Packaging


The power semiconductor market is poised for remarkable growth in the next several years, fueled by the adoption of electric vehicles and renewable energy, but it also driving big changes in the packaging needed to protect and connect these devices. Packaging is playing an increasingly critical role in the transition to higher power densities, enabling more efficient power supplies, power deli... » read more

IC Manufacturing Targets Less Water, Less Waste


Fabs, OSATs, and equipment makers are accelerating their efforts to consume less water while recycling more material waste in a trend toward better sustainability. With chips, sustainability is heavily focused on carbon emissions, and energy consumption is a significant contributor. But there is an equal effort underway to reduce water consumption and pollution. Across the globe, the number ... » read more

LAB Flip Chip Reflow Process Robustness Prediction By Thermal Simulation


By Gabriel Chang and Ricky Zang Nowadays, there are many interconnects in IC chips. One of the packaging goals is to connect an IC to the next level of subsystem circuitry (package substrates/print circuit boards). Mass reflow (MR) of solder joints is a widely adapted and stable process in the industry. The applications of MR include flip chip, ball mounting, surface mount technology (SMT), ... » read more

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