tag: Amkor

Reliability Risks Shift To The Materials Stack
By Gregory Haley - 18 Dec, 2025 - Comments: 0

The semiconductor industry’s push into 3D integration and large-format substrates has fundamentally changed the role of materials in packaging. What were once structural supports and electrical insulators have become critical performance limiters. Modern packages contain far more polymers, adhesives, advanced dielectrics, thermal materials, and composite laminates than previous generations... » read more

What’s Next for 2.5D Packaging?
By Bryon Moyer - 18 Dec, 2025 - Comments: 0

Interposers and bridges, two of the key elements for interconnecting multiple chips and chiplets in an advanced package, are undergoing fundamental changes in how they're built and assembled. Interposers are becoming thicker and more complex, while bridges are being used to reduce the assembled cost. Both efforts are facing new challenges. Interposers are effectively platforms on which mu... » read more

Chiplet Integration and Testing: Key Lessons for Next-Gen Semiconductor Packaging
By Vineet Pancholi - 20 Nov, 2025 - Comments: 0

The Chiplet Era Has Arrived The floodgates for chiplet-based design have officially opened. Over the past several quarters, manufacturing test flows have been validating 2.5D package architectures, and production volumes are ramping up. These designs promise flexibility and performance, but they also introduce new test sensitivities—electrical, thermal, and mechanical—that challenge tradit... » read more

Chip Industry Week in Review
By The SE Staff - 31 Oct, 2025 - Comments: 0

San Francisco-based Substrate raised more than $100 million to build a vertically integrated foundry that uses particle accelerators to produce "the world's brightest beams, enabling a new method of advanced X-ray lithography." The company claims its technology is comparable to ASML's high NA EUV, and notes it can extend well beyond 2nm. ASML has not publicly commented. The Nexperia chip sho... » read more

Enabling The Future: Heterogeneous Integration From Connected Devices To Data Centers
By WonChul Do - 23 Oct, 2025 - Comments: 0

The digital landscape is evolving at an unprecedented pace. From smartphones and wearables to autonomous vehicles and hyperscale data centers, the demand for faster, smarter, and more efficient electronics is reshaping the semiconductor industry. At the core of this transformation is heterogeneous integration—the convergence of multiple technologies, functions, and components into unified sys... » read more

Digital Twins For Packaging: Bridging Design, Fab, Test, And Reliability
By Gregory Haley - 23 Oct, 2025 - Comments: 0

Digital twins dominated discussions at SEMICON West this year, appearing in keynote presentations, panel sessions, and workshops. The conversation reflected a noticeable shift in how the industry views the technology. What once was mainly associated with design exploration now spans the manufacturing lifecycle. In packaging and assembly, digital twins are emerging as a way to connect design ... » read more

Data Centers Boost Voltage For Higher Efficiency
By Bryon Moyer - 16 Oct, 2025 - Comments: 0

The power architecture used in HPC and AI data centers today is about to undergo a significant change in an effort to boost power efficiency. While voltages at the chip level will remain the same, the voltages leading to those chips will be kept higher for longer distances. This change has broad implications for DC-DC converters. The existing architecture brings AC to each rack, converts it ... » read more

Mitigating Warpage In Multi-Chiplet Systems
By Laura Peters - 22 Sep, 2025 - Comments: 0

Warpage of dies, redistribution layers, and interposers is a growing problem in multi-chiplet packages, and it can have a dramatic impact on the behavior and reliability of these devices. Multiple factors contribute to warpage, including larger chip sizes, severe thinning of the silicon substrate, temporary bonding and debonding processes, and scaling of bump pitch and size. Each of these ca... » read more

Chip Industry Week in Review
By The SE Staff - 19 Sep, 2025 - Comments: 0

Amkor, TSMC, and Cadence partnered with Tesoro VC, which will serve as the lead operator of a new Global AI + Semiconductor Startup Hub and a Global Design Center in Phoenix, Arizona, aimed at chip innovation, startup growth, and advanced manufacturing. Nvidia will invest $5 billion in Intel common stock at a purchase price of $23.28 per share and the companies will collaborate on AI infrastru... » read more

Enhancing Clip Attach Vision Accuracy In Semiconductor Manufacturing
By Mahenthren Palaniappan - 18 Sep, 2025 - Comments: 0

In the semiconductor industry, the outsourced semiconductor assembly and test (OSAT) sector plays a pivotal role in the global technology landscape. As the backbone of electronic device manufacturing, OSAT companies are entrusted with the critical task of assembly, testing, and packaging of devices. Maintaining quality in OSAT operations is of paramount importance, as it directly impacts the pe... » read more

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