Chip Industry Week in Review


Apple plans to increase its U.S. investment by an additional $100 billion over four years, which includes the launch of an advanced manufacturing supply chain program, spurring a number of related chip industry announcements, including: Apple will invest in Amkor's new packaging and test facility in Arizona as its first and largest customer, and Amkor will package and test Apple silicon pr... » read more

Can Cheaper Lasers Handle Short Distances?


Optical technology is well established for long-haul communications, but the distances it serves are shrinking — especially in the data center. Vertical-cavity surface-emitting lasers (VCSELs) already drive short fiber links. But efforts are underway to further scale them down to provide more connections through waveguides than fiber can provide. “We have seen the transition from long... » read more

Engineering Reliable Heat Dissipation With Indium-Silver Thermal Interfaces


In recent years, rapid technological advancements in the field of high-performance computing have driven the development of increasingly sophisticated and powerful computing devices. This growth is expected to continue, with expansion into areas such as central processing units (CPUs), artificial intelligence (AI) systems, and automotive products. Flip chip lidded ball grid array (FCLBGA) pa... » read more

The Rise Of Panel-Level Packaging


An insatiable demand for logic to memory integration for AI and high-performance computing is driving progress toward very large-format packages, which are expected to approach 10 times the maximum reticle size in the next few years. These assemblies are best developed using fan-out panel-level packaging, replacing today’s wafer carrier with a panel. Fan-out packaging enables substantially... » read more

Chip Industry Week in Review


AI featured big at this week's Design Automation Conference (DAC) in San Francisco. Dozens of companies featured AI-related tools (see product section below), as well as significant improvements to existing tools and some entirely new approaches for designing chips. Among the highlights: Siemens unveiled an AI-enhanced toolset for the EDA design flow that enables customers to integrate the... » read more

Power Delivery Challenges For AI Chips


As artificial intelligence (AI) workloads grow larger and more complex, the various processing elements being developed to process all that data are demanding unprecedented levels of power. But delivering this power efficiently and reliably, without degrading signal integrity or introducing thermal bottlenecks, has created some of the toughest design and manufacturing challenges in semiconducto... » read more

Physics Limits Interposer Line Lengths


Electrical interposers provide a convenient surface for mounting multiple chips within a single package, but even though interposer lines theoretically can be routed anywhere, insertion losses limit their practical length. Lines on interposers — and on silicon interposers in particular — can be exceedingly narrow. Having a small cross-section makes such lines resistive, degrading signals... » read more

2024 Corporate Responsibility Report


Amkor recognizes the need for transparent reporting, and we have been publishing annual reports to facilitate the disclosure of comparable, consistent, and reliable information about our initiatives and progress for our stakeholders. Last year, we verified our targets to achieve net-zero greenhouse gas emissions by 2050, including near-term targets, with the Science Based Targets initiative ... » read more

Maximizing Signal Integrity: Fine-Tuning Via Impedance In HDFO Architectures


The most different aspect between a normal lamination structure and High-Density Fan-out (HDFO) is the routing scale. That aspect is also the challenge and focus of this study. At an HDFO scale, most of the electrical properties cannot be measured by instruments. Therefore, this study uses the indirect method to determine the impedance information of the via and match the impedance. Since the v... » read more

Cooling Chips Still A Top Challenge


Increasing levels of semiconductor integration means more work needs to be done in smaller spaces, which in turn generates more heat that needs to be dissipated. Managing heat dissipation in advanced node dies and in multi-die assemblies is critical to their functionality and their longevity. And while much of the focus has been on improving power efficiency, which reduces the rate of power ... » read more

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