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Enabling Training of Neural Networks on Noisy Hardware


Abstract:  "Deep neural networks (DNNs) are typically trained using the conventional stochastic gradient descent (SGD) algorithm. However, SGD performs poorly when applied to train networks on non-ideal analog hardware composed of resistive device arrays with non-symmetric conductance modulation characteristics. Recently we proposed a new algorithm, the Tiki-Taka algorithm, that overcomes t... » read more

Toward Software-Equivalent Accuracy on Transformer-Based Deep Neural Networks With Analog Memory Devices


Abstract: Recent advances in deep learning have been driven by ever-increasing model sizes, with networks growing to millions or even billions of parameters. Such enormous models call for fast and energy-efficient hardware accelerators. We study the potential of Analog AI accelerators based on Non-Volatile Memory, in particular Phase Change Memory (PCM), for software-equivalent accurate infe... » read more

Functional Safety Across Analog And Digital Domains


The autonomy of vehicles has been all the rage recently. There are different levels of autonomous driving, with level 5 “Full Automation” being the target the industry is working towards, and Level 2 “Partial Automation” and Level 3 “Conditional Automation” being the level at which the automotive sector currently delivers the most technology. The amount of electronics in cars has be... » read more

3D Printing For More Circuits


After several years of experimentation, and growing success in volume manufacturing for some use cases, technologies for 3D printing of electronic circuits are becoming more common. Some innovations in processes and materials are moving these technologies closer to mainstream electronics manufacturing. Christopher Tuck, professor of material science at the University of Nottingham, observed ... » read more

Challenges In RF Design


Designing highly integrated components for radio frequency applications poses special challenges for system engineers, designers and the commissioning engineers. The boundary between chip, package and board is increasingly vanishing on modern components. It is growing more common for parts of the functionality to be moved to the package or even the board. In some cases, the requirements have be... » read more

Bringing Scalable Power Integrity Analysis To Analog IC Designs


Power integrity is a broad term in integrated circuit (IC) design and verification. However, when IC engineers are working through design signoff, power integrity analysis focuses on three specific aspects of a design: Power: Verify the chip design as implemented provides the total predicted power under different operating modes. Performance: Find and eliminate performance issues affect... » read more

Faster Analog Design Closure With Early Parasitic Analysis Flow – Part 1


In part 1 of this series, Denis Goinard, Director of Engineering at Synopsys, discusses how Synopsys provides a unified workflow to accurately estimate, measure, extract and simulate parasitics by bringing signoff tools into the design process, enabling faster design convergence. Click here to play the video. Note: This is a Synopsys 'video white paper.' For more video white papers, click h... » read more

System-In-Package Thrives In The Shadows


IC packaging continues to play a big role in the development of new electronic products, particularly with system-in-package (SiP), a successful approach that continues to gain momentum — but mostly under the radar because it adds a competitive edge. With a SiP, several chips and other components are integrated into a package, enabling it to function as an electronic system or sub-system. ... » read more

Wrestling With Analog At 3nm


Analog engineers are facing big challenges at 3nm, forcing them to come up with creative solutions to a widening set of issues at each new process node. Still, these problems must be addressed, because no digital chip will work without at least some analog circuitry. As fabrication technologies shrink, digital logic improves in some combination of power, performance, and area. The process te... » read more

40 GHz VCO and Frequency Divider in 28 nm FD-SOI CMOS Technology for Automotive Radar Sensors


Abstract: "This paper presents a 40 GHz voltage-controlled oscillator (VCO) and frequency divider chain fabricated in STMicroelectronics 28 nm ultrathin body and box (UTBB) fully depleted silicon-on-insulator (FD-SOI) complementary metal-oxide–semiconductor (CMOS) process with eight metal layers back-end-of-line (BEOL) option. VCOs architecture is based on an LC-tank with p-type metal-oxide... » read more

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