Advanced Packaging Driving New Collaboration Across Supply Chain


The semiconductor industry is undergoing a profound shift in packaging technologies to ones that rely on close collaboration among multiple stakeholders to solve intricate, multi-faceted, and extraordinarily complex problems. At the heart of this change is the convergence of heterogeneous integration, chiplets, and 3D stacking. Heterogeneous approaches allow companies to combine different te... » read more

Boost High-Performance IC Design Flows With Early Interactive Symmetry Checking


In the realm of high-performance IC (integrated circuit) design, symmetry is not just an aesthetic preference—it’s a critical factor for ensuring proper device functionality, especially in analog and RF designs. Achieving symmetry early in the design process helps to ensure consistent electrical behavior, which is essential for meeting performance goals and maintaining device reliability. H... » read more

Formal Verification Of A Mixed Signal IP with Both Digital And Analog Blocks


A new technical paper titled "Analogous Alignments: Digital "Formally" meets Analog" was published by researchers at Infineon Technologies. Abstract: "The complexity of modern-day System-on-Chips (SoCs) is continually increasing, and it becomes increasingly challenging to deliver dependable and credible chips in a short time-to-market. Especially, in the case of test chips, where the aim is... » read more

Analog In-Memory Computing: Fast Deep NN Training (IBM Research)


A new technical paper titled "Fast and robust analog in-memory deep neural network training" was published by researchers at IBM Research. Abstract "Analog in-memory computing is a promising future technology for efficiently accelerating deep learning networks. While using in-memory computing to accelerate the inference phase has been studied extensively, accelerating the training phase has... » read more

Promises and Perils of Parallel Test


Testing multiple devices at the same time is not providing the equivalent reduction in overall test time due to a combination of test execution issues, the complexity of the devices being tested, and the complex tradeoffs required for parallelism. Parallel testing is now the norm — from full wafer probe DRAM testing with thousands of dies to two-site testing for complex, high-performance c... » read more

Standardizing Defect Coverage In Analog/Mixed Signal Test


A newly drafted IEEE standard will bring more consistency to defect metrics in analog/mixed (AMS) designs, a long-overdue step that has become too difficult to ignore in the costly heterogeneous assemblies being deployed inside of data centers and mobile devices. Standardizing analog is no simple feat due to the legacy approach to AMS design, and this is not the first attempt at improving te... » read more

Managing Complexity And A Left Shift: Reconfigurable Mixed-Signal Circuits For Complex Integrated Systems


By Björn Zeugmann and Benjamin Prautsch The chip market is growing worldwide; it’s projected to nearly double by 2030 to over one trillion dollars. Most of this market is made up of digital functions in the form of logic, microprocessors, and memory. Although analog ICs account for only around 15% of the total, they are key components for overall systems and are therefore almost always pr... » read more

Analog Consolidation Spurs New Round Of Startups


A new wave of startups is rising to meet the growing need for specialized analog customization in chip design projects, opening the door to more affordable custom designs. These startups are breathing new life into a sector, which as a result of consolidation has favored only the largest chipmakers. As larger analog companies acquire smaller ones, many companies that were previously engaged ... » read more

Integration Hurdles For Analog And RF In Next-Gen Packages


A rapid increase in wireless connectivity and more sensors, coupled with a shift away from monolithic SoCs toward heterogeneous integration, is driving up the amount of analog/RF content in systems and changing the dynamics within a package. Since the early 2000s, the majority of chips used at the most advanced nodes were systems-on-chip (SoCs). All features had to fit into a single planar S... » read more

3D-IC Intensifies Demand For Multi-Physics Simulation


The introduction of full 3D-ICs will require a simultaneous analysis of various physical effects under different workloads, a step-function change that will add complexity at every step of the design flow, expand and alter job responsibilities, and bring together the analog and digital design worlds in unprecedented ways. 3D-ICs will be the highest-performance advanced packaging option, in s... » read more

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