Blog Review: June 19


Siemens' John McMillan and Todd Burkholder suggest using an automatic formal-based approach to verifying chiplet package connections early in the design process. Cadence's Veena Parthan explores the intricacies of wind tunnel testing in automotive design and how the collaborative relationship between computational fluid dynamics (CFD) and wind tunnels has resulted in accelerated and more nua... » read more

IC Industry’s Growing Role In Sustainability


The massive power needs of AI systems are putting a spotlight on sustainability in the semiconductor ecosystem. The chip industry needs to be able to produce more efficient and lower-power semiconductors. But demands for increased processing speed are rising with the widespread use of large language models and the overall increase in the amount of data that needs to be processed. Gartner estima... » read more

Temperature: A Growing Concern For Chip Security Experts


While everyone in the semiconductor industry wants to have the hottest new product, having that type of temperature manifest in a literal sense poses a threat not just to product stability and performance but to the security of the chips themselves. Temperature has become an object of fascination to security researchers due to the vagaries of how the physical properties of heat affect perfor... » read more

New Approaches Needed For Power Management


Power is becoming a bigger concern as the amount of data being processed continues to grow, forcing chipmakers and systems companies to rethink compute architectures from the end point all the way to the data center. There is no simple fix to this problem. More data is being collected, moved, and processed, requiring more power at every step, and more attention to physical effects such as he... » read more

When To Expect Domain-Specific AI Chips


The chip industry is moving toward domain-specific computation, while artificial intelligence (AI) is moving in the opposite direction, creating a gap that could force significant changes in how chips and systems are architected in the future. Behind this split is the amount of time it takes to design hardware and software. In the 18 months since ChatGPT was launched on the world, there has ... » read more

A High-Capacity Solution for Power and Signal Integrity on 2.5D Silicon Interposers


The present trends in technology — such as increasing demand for computational power from CPUs and GPUs, connectivity driven by Internet of Things (IoT), data demands around connected and self-driving cars, and the design of processors optimized for artificial intelligence (AI) — require more functionality from integrated circuits. As designers struggle to find ways to scale with complexity... » read more

Blog Review: June 12


Cadence's Deep Mehta finds that PCIe 6.0 switches need advanced verification strategies that delve deeper than basic functionality, such as generating backpressure traffic to identify potential performance bottlenecks and ensure the switch operates optimally in real-world scenarios. Siemens' Reetika explains why proper management and verification of reset domain crossing (RDC) paths are cruc... » read more

Toward A Software-Defined Hardware World


Software-defined hardware may be the ultimate Shift Left approach as chip design grows closer to true co-design than ever with potential capacity baked into the hardware, and greater functionality delivered over the air or via a software update. This marks another advance in the quest for lower power, one that’s so revolutionary that it’s upending traditional ideas about model-based systems... » read more

Blog Review: June 5


Cadence's Neelabh Singh provides an overview of the low power entry and exit flows in USB4 Version 2.0 link speed and how they have been simplified by making low power entry uni-directional and removing the need for certain handshakes for low power exit of the re-timers. In a podcast, Siemens' Steph Chavez chats with Daniel Beeker of NXP about the foundational importance of power distributio... » read more

Physics-Aware AI Is The Key To Next Gen IC Design


Chip design projects are notorious for generating huge amounts of design data. The design process calls for a dozen or more electronic design automation (EDA) software tools to be run in sequence. Together, they write out hundreds of gigabytes of intermediate data on the way to creating a final layout for manufacturing. Traditionally, this has been seen as a problem. But this richness of data i... » read more

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