tag: ANSYS

Chip Industry Talent Shortage Drives Academic Partnerships
By Liz Allan - 16 Oct, 2023 - Comments: 0

Universities around the world are forming partnerships with semiconductor companies and governments to help fill open and future positions, to keep curricula current and relevant, and to update and expand skills for working engineers. Talent shortages repeatedly have been cited as the number one challenge for the chip industry. Behind those concerns are several key drivers, and many more dom... » read more

Partitioning Processors For AI Workloads
By Ann Mutschler - 12 Oct, 2023 - Comments: 0

Partitioning in complex chips is beginning to resemble a high-stakes guessing game, where choices need to extrapolate from what is known today to what is expected by the time a chip finally ships. Partitioning of workloads used to be a straightforward task, although not necessarily a simple one. It depended on how a device was expected to be used, the various compute, storage and data paths ... » read more

Automating Antenna Placement Workflow With PyAEDT
By Pete Gasperini - 12 Oct, 2023 - Comments: 0

Antenna designs can reach daunting levels of complexity, and nowhere is that truer than in advanced 5G and 6G systems. One of the most difficult problems in this design space is signal degradation stemming from electromagnetic (EM) interaction between the phased array antenna and the host structure itself, such as a base station or satellites. It is a pernicious issue that takes several advance... » read more

Maximizing Design Flexibility For Multi-Layered And Diffractive Optical Components
By Ansys - 11 Oct, 2023 - Comments: 0

A broad range of optical devices use nanostructured layers and surfaces to manipulate beams of light through diffraction and interference. Example devices include diffraction gratings, metasurfaces, diffractive optical elements, and metalenses. While the purpose and function of these devices can differ, they offer similar challenges from the point of view of simulation. In this white paper, ... » read more

Blog Review: October 11
By Jesse Allen - 11 Oct, 2023 - Comments: 0

Cadence's Sangeeta Soni examines Integrity and Data Encryption (IDE) verification considerations for Compute Express Link (CXL) devices, including MAC generation and handling, key programming and exchange, and early MAC termination. Synopsys' Madhumita Sanyal points to how the increased bandwidth of PCIe 6.0 supports the demanding requirements of AI accelerators. Siemens' Kevin Webb expla... » read more

Blog Review: October 4
By Jesse Allen - 04 Oct, 2023 - Comments: 0

Cadence's Felipe Goncalves checks out the Integrity and Data Encryption (IDE) feature in PCIe 6.0, a new layer inserted between the transection layer and data link layer with the goal of protecting against threats from physical attacks on the link. Siemens' Robin Bornoff, Daniel Berger, and Kai Liu explore the potential for large language models (LLMs) make the use of CAE tools simpler, more... » read more

Chip Industry Week In Review
By The SE Staff - 29 Sep, 2023 - Comments: 0

By Susan Rambo, Liz Allan, and Gregory Haley. TSMC rolled out the second version of its 3Dblox, which creates an infrastructure for stacking chiplets and other necessary components in a package, along with a standardized way of achieving that. Two novel features are chiplet mirroring for design reuse, and what is basically sandbox for power and thermal analysis of different design elements. ... » read more

Industry Pressure Grows For Simulating Systems Of Systems
By Brian Bailey - 28 Sep, 2023 - Comments: 0

Most complex systems are designed in a top-down manner, but as the amount of electronic content in those systems increases, so does the pressure on the chip industry to provide high-level models and simulation capabilities. Those models either do not exist today, or they exist in isolation. No matter how capable a model or simulator, there never will be one that can do it all. In some cases,... » read more

Blog Review: September 27
By Jesse Allen - 27 Sep, 2023 - Comments: 0

Siemens' Dirk Hartmann examines how a continual improvement in predictive capability processing and algorithms enables the evolution of simulation performance and highlights two areas that underpin most simulation tools. Synopsys' Ian Land, Jason Niatas, and Marc Serughetti note that digital twins can be used from the chip level through sub-systems and up to the system level to examine perfo... » read more

ReRAM Seeks To Replace NOR
By Karen Heyman - 25 Sep, 2023 - Comments: 0

Resistive RAM is gaining renewed attention as demand for faster and cheaper non-volatile memory alternatives continues to grow, particularly in applications such as automotive. Embedded flash has long left designers wishing for better write speeds and lower energy consumption, but as the leading edge of that technology shrunk to 28nm, another problem arose. Manufacturing flash memory at thos... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy