Cold Plate Technology Comparison


New types of energy, such as wind and solar power, are being utilized more prevalently and hybrid cars/buses are being identified as a means of reducing carbon dioxide emissions resulting from the use of fossil fuels. Electronic systems like frequency converters for wind power and train utilization are required to provide ever higher levels of energy savings. As such, IGBT (insulated-gate bipol... » read more

Blog Review: June 7


Synopsys' Kenneth Larsen and Powerchip's S.Z. Chang explore wafer-on-wafer (WoW) and chip-on-wafer (CoW), 3D hybrid bonding schemes that can be used to stack memory on logic with shorter signal transmission distance at no wasted power and more interconnect and bandwidth density. In a podcast, Siemens' Conor Peick, Nand Kochhar, and Mark Sampson chat about how companies can address growing co... » read more

Blog Review: May 31


Cadence's Moshik Rubin looks at how the Portable Test and Stimulus Standard (PSS) is finding new use cases in ATE production test by enabling creation of a rich set of functional test scenarios in a reusable way. Synopsys' LJ Chen and Dana Neustadter check out the latest version of the Universal Flash Storage (UFS) standard, which doubles the data transfer rate of the preceding UFS 3.1 solut... » read more

Week In Review: Design, Low Power


Cadence bought Pulsic, a U.K.-based developer of place-and-route tools for custom digital and analog. The acquisition follows a previous acquisition attempt by a Chinese firm in August 2022, which was blocked by the U.K. government. At the G7 Summit in Japan, IBM announced a 10-year, $100 million initiative with the University of Tokyo and the University of Chicago to develop a quantum-centr... » read more

Chip Design CEO Outlook


Semiconductor Engineering sat down with Joseph Sawicki, executive vice president for IC EDA at Siemens Digital Industries Software; John Kibarian, president and CEO of PDF Solutions; John Lee, general manager and vice president of Ansys' Semiconductor Business Unit; Niels Faché, vice president and general manager of PathWave Software Solutions at Keysight; Dean Drako, president and CEO of IC M... » read more

IP Becoming More Complex, More Costly


Success in the semiconductor intellectual property (IP) market requires more than a good bit of RTL. New advances mandate a complete design, implementation, and verification team, which limits the number of companies competing in this market. What constitutes an IP block has changed significantly since the concept was first introduced in the 1990s. What was initially just a piece of RTL (reg... » read more

Blog Review: May 24


Siemens' Patrick McGoff finds that designers have not had easy tools to address solderability, leaving a critical part of the manufacturing success of a PCB to the component engineer or the contract manufacturer, and points to manufacturing-driven design as a way to avoid quality issues later. Cadence's Rich Chang finds that effective UPF low-power verification and debug involves more than o... » read more

Week In Review: Design, Low Power


Design Ansys has signed a definitive agreement to acquire EDA tool company Diakopto. Diakopto specializes in software tools that find the cause of layout parasitics. Its products are ParagonX, for analyzing and debugging IC designs and layout parasitics, and EM/IR analysis/verification tool PrimeX. The deal is expected to close in the second quarter of 2023. SEMI’s FlexTech community issu... » read more

Blog Review: May 17


Synopsys' Dana Neustadter examines the key industries driving Ethernet security, challenges to securing Ethernet networks, and the MACsec protocol that guards against network data breaches by encrypting data traffic between Ethernet-connected devices. Siemens' Stephen Chavez points to the improvements gained from design reuse in PCB design but warns that inefficient processes for managing an... » read more

Holistic Power Reduction


The power consumption of a device is influenced by every stage of the design, development, and implementation process, but identifying opportunities to save power no longer can be just about making hardware more efficient. Tools and methodologies are in place for most of the power-saving opportunities, from RTL down through implementation, and portions of the semiconductor industry already a... » read more

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