Chip Industry Week In Review

SRC’s Microelectronics and Advanced Packaging Roadmap; chip export loopholes closed; industry-academic partnerships; wirebonding; photomasks; Arm design ecosystem; GF’s GaN chip funding; Infineon power semis.


By Susan Rambo, Gregory Haley, and Liz Allan

SRC unfurled its Microelectronics and Advanced Packaging (MAPT) industry-wide 3D semiconductor roadmap, addressing such topics as advanced packaging, heterogeneous integration, analog and mixed-signal semiconductors, energy efficiency, security, the related foundational ecosystem, and more. The guidance is the collective effort of 300 individuals and 112 organizations from industry, academia and government.

Fig. 1: Drivers and interrelationships in the semiconductor ecosystem. Source: Semiconductor Research Corp.

The U.S. government tightened controls on chip exports to China with the goal of closing loopholes that circumvent existing government restrictions. The new rules, released by the Bureau of Industry and Security (BIS), update the list of chip equipment on the control list, as well as items that support supercomputing applications and end-users. The restrictions aim to limit China’s ability to develop advanced AI for military uses and espionage. BIS threw companies like NVIDIA a lifeline, saying they are open to the semiconductor industry’s input for finding ways to keep sending AI chips to China for small and medium-sized systems.

The SIA issued a warning about the impact of regulations on a robust industry. “Overly broad, unilateral controls risk harming the U.S. semiconductor ecosystem without advancing national security as they encourage overseas customers to look elsewhere,” it said in a statement.

Foxconn and NVIDIA will collaborate on AI factories and systems, aimed  at digitalizing manufacturing and inspection workflows. The companies also are developing AI-powered electric vehicle and robotics platforms, and generative AI-based AI services.

Universities, companies, and governments are forming broad partnerships to update skills and foster innovation in chips, security, AI, and related fields.

Quick links to more news:

Design and Power
Manufacturing and Test
Pervasive Computing and AI
Further Reading And Newsletters

Design and Power

The EDA industry reached $3.963 billion in revenue in Q2, boosted by a 17.6% increase in computer-aided engineering and a 17.2% increase in IP physical design and verification, according to a just-released ESD Alliance Electronic Market Data report.

Security, reliability, and integration issues are slowing the market for plug-and-play chiplets. What is holding back the commercialization of chiplets? Industry experts debated the next steps.

Broadcom used Cadence’s new Cerebrus AI-driven design flows, reporting improved performance, power, and area (PPA) in a variety of 3nm and 5nm chip designs.

Arm is creating a Total Design ecosystem for customers that use Arm Neoverse Compute Subsystems (CSS), including ASIC design houses, EDA and IP vendors, foundries, and firmware developers. Synopsys, Cadence, Alphawave Semi, Rambus, Broadcom, Intel Foundry Services, TSMC, and others have joined Arm’s Total Design to support custom SoCs based on Arm Neoverse CSS. Some of the EDA companies’ IP and EDA tools will be available via Arm’s ecosystem.

As DRAM gets faster, timing constraints, jitter, and signal integrity become harder to control. The real challenge is understanding what can go wrong early in the design process.

NAND flash contract prices are expected to rise in Q4 by about 8% to 13%, largely attributed to stringent production controls by suppliers, reports TrendForce. The outlook for 2024 suggests the upward price trajectory may face challenges.

UMC certified Ansys’ Redhawk-SC and AnsysRedhawk-SC Electrothermal for simulating UMC’s 3D-IC packaging technology.

Fig. 2:  Electrothermal simulation result showing the temperature distribution of a chip and package assembly. Source: Ansys

The amount of power consumed by redundant non-functional toggles, or glitch power, can be as high as 35% of total power consumption in a design. What can be done about that? The problems are particularly challenging with compute-intensive designs, and solutions are incomplete.

Arteris and Fraunhofer IESE partnered to make some of their products interoperable. The goal is to have Arteris’ FlexNoC and Ncore network-on-chip (NoC) development environment work together with Fraunhofer IESE’s DRAM subsystem design space exploration framework, resulting in a faster and cheaper way to develop advanced DRAM-centric NoCs.

Codasip unveiled its next-generation configurable RISC-V baseline processors, called  the 700 family. The first core in the family is A730, a 64-bit RISC-V application core.

Verifying an SoC is very different than verifying RISC-V processors due to the huge state space in the processor. In addition to the tools needed for an SoC, additional tools are required for a step and compare environment.

Broadcom shipped a 5nm single-chip 25.6Tb/s router, called the Qumran3D, with Ethernet port rates from 100 to 800 Gb/s, using a 100Gb/s PAM-4 SerDes and in-package HBM packet memory.

Intel launched its new Intel Core 14th Generation desktop processor family, led by the Intel  Core i9-14900K.

Manufacturing and Test

GlobalFoundries received a $35 million award from the U.S. government to accelerate the manufacturing of differentiated GaN-on-silicon chips at its facility in Essex Junction, Vermont.

TSMC is abandoning an effort to build a 1nm chip factory in rural Taiwan after a protest by local residents, who did not want to be displaced by the expanded business park, reports Reuters. The Taiwan government promises to find a new location for the factory.

Heterogenous integration is finding its footing. Definitions, applications, and tools are still evolving, but success stories are becoming more common.

Big changes are ahead for the photomask industry. Curvilinear technology could boost yield and improve scalability, but it requires full industry support and a lot of work.

New wirebonding applications and the transition to copper are expanding the use of an older technology into newer markets.

Renesas announced a major reorganization of its semiconductor solutions business. It includes the establishment of four product-based technology groups, a new software and digitalization team, and the centralization of operations, engineering, and key foundational organizations.

Synopsys expanded its collaboration with Arm to provide optimized IP and EDA solutions to accelerate custom silicon on advanced nodes.

Synopsys and the Indian Institute of Technology Bombay opened the Synopsys Semiconductor Lab for Virtual Fab Solutions at IIT Bombay to develop new talent for the semiconductor industry.

Micron will invest up to $1 billion more in its new facility in Penang, Malaysia, over the next few years to increase factory space to a total of 1.5 million square feet

The global ratio of mature (>28nm) to advanced (<16nm) processes is predicted to hover around 7:3, according to TrendForce. China’s mature process capacity is anticipated to grow from 29% in 2023 to 33% by 2027, led by SMIC, HuaHong Group, and Nexchip.

Advantest issued a global call for papers for its VOICE 2024 Developer Conference, focusing on leading-edge technologies and future trends, to be held in San Diego from June 3 to 5, 2024.Upcoming webinars are here.


A new pre-silicon power side-channel analysis framework based on graph neural networks (GNNs) converts register-transfer level (RTL) designs of encryption hardware into control-data flow graphs, then detects the design modules susceptible to side-channel leakage, according to researchers at University of Texas at Dallas, Technology Innovation Institute, and University of Illinois Chicago.

Cisco reported active exploitation of a vulnerability in the web UI feature of its IOS XE Software. It allows a remote, unauthenticated attacker to create an account on an affected system with privilege level 15 access, then use that account to gain control of the affected system.

The Open Compute Project Foundation (OCP) announced the OCP Security Appraisal Framework and Enablement (S.A.F.E.) to improve the trustworthiness of devices across all data center IT infrastructure.

Infineon joined the Europay, MasterCard, and Visa (EMVCo) Board of Advisors to improve global trust and convenience in card payments. The organization is responsible for authentication specifications and security technologies, such as EMV Chip Contact, EMV 3-D Secure (3DS), and more.

The Defense Advanced Research Projects Agency (DARPA) is seeking proposals to rapidly re-purpose or transfer autonomy to new and different missions via modeling and simulation. The agency also selected teams for its Resilient Supply-and-Demand Network to create a toolkit to improve systemic resilience in modern supply chains.

The Cybersecurity and Infrastructure Security Agency (CISAcreated the Public Safety Communications and Cyber Resiliency Toolkit; updated its whitepaper on practicing security by design, with 17 U.S. and international partners; and issued numerous other alerts, including an advisory concerning Schneider Electric’s power monitoring and operation tools.

CISA, the Federal Bureau of Investigation (FBI), and the Multi-State Information Sharing and Analysis Center (MS-ISAC) released an advisory about a critical vulnerability affecting certain versions of Atlassian Confluence Data Center and Server.

CISA, the National Security Agency (NSA), the FBI, and the MS-ISAC updated their joint ransomware guide with prevention tips such as hardening SMB protocols, revised response steps, and added threat hunting insights. The organizations also released a joint guide titled Phishing Guidance: Stopping the Attack Cycle at Phase One.

Pervasive Computing and AI

Hewlett Packard Enterprise built an AI supercomputer, dubbed “Austral,” for France’s HPC and AI data center. The goal is to provide regional access for public and private organizations to foster the nation’s AI initiative and advance areas in climate modeling, biotechnology, health care, and materials science. The computer has an HPE Cray XD2000 supercomputer with HPE Machine Learning Development Environment (MLDE) for training machine learning large-scale models. Funding for the project came from the Normandy Region, the French State, and the European Union through the European Regional Development Fund (ERDF).

Qualcomm and Google are developing a RISC-V Snapdragon Wear platform to power next-generation Wear OS solutions. Qualcomm plans to commercialize the RISC-V based wearables solution globally.

As part of the MX Alliance, AMD, Arm, Intel, Meta, Microsoft, NVIDIA, and Qualcomm standardized next-generation narrow precision data formats for AI, releasing the Microscaling Formats (MX) Specification v1.0 through the Open Compute Project Foundation (OCP).

NVIDIA expanded two frameworks on its Jetson platform for edge AI and robotics and created a Jetson Generative AI Lab for developers to use with open-source models. The company also announced “generative AI on PC is getting up to 4X faster via TensorRT-LLM for Windows, an open-source library that accelerates inference performance.”

Shipments of AI servers, including those with GPUs, FPGAs, and ASICs, will exceed 1.2 million units in 2023 for a year-over-year increase of 37.7%, making up almost 9% of total server shipments, reports TrendForce. This number is expected to grow 38% in 2024 with AI occupying a 12% share.

Infineon introduced its first Qi2 magnetic power profile (MPP) charging transmitter reference design kit, offering magnet-based fixed positioning with an intuitive user experience, ideal for automotive and consumer applications, such as in-cabin wireless charging, smartphones, EarPods cases, portable speakers, and healthcare equipment.


Infineon, Hyundai, and Kia signed a multi-year supply agreement for silicon carbide (SiC) and silicon power semiconductors. Infineon will build and reserve manufacturing capacity to supply SiC and silicon power modules and chips to Hyundai and Kia until 2030.

New Mexico’s governor directed state agencies to switch to an all-electric vehicle fleet within the next 12 years “to make sure the state is ‘walking the walk’ when it comes to widely adopting low- and zero-emission vehicles.”

The New York governor said the Federal Highway Administration has approved the state’s plan to use National Electric Vehicle Infrastructure Program Funds to install and operate additional fast-charging stations.

The National Highway Traffic Safety Administration (NHTSA) opened an investigation into Cruise vehicles equipped with automated driving systems (ADS) because they may not be exercising appropriate caution around pedestrians in the roadway.

Tesla issued an over-the-air software update in response to last week’s NHTSA recall for some 2021-23 Model X vehicles, because “the vehicle controller may fail to detect low brake fluid and will not display a warning light.”

Tesla, GM, and Ford reduced capacity to manufacture EVs, citing various concerns, according to Reuters.

Sweden’s Volta, an electric truck maker, filed for bankruptcy. The company cited difficulties after its battery and parts supplier, Proterra, filed for bankruptcy. Volta also faced challenges raising capital.

The electric-vehicle (EV) market is estimated to grow at a 20% compound annual growth rate through 2030, when sales volumes are estimated to reach 64 million, which is four times the estimated EV sales volume in 2022, reports McKinsey. The firm noted that EV component supply needs to be sufficient to meet this demand, and the supply of SiC and SiC MOSFETs warrants special attention.

Nissan unveiled its Hyper Punk next-generation crossover concept vehicle, with a vehicle-to-everything (V2X) system allowing users to run and charge their devices anytime while sharing the vehicle’s energy with collaborators and community events.

Fig. 3: Nissan Hyper Punk concept. Source: Nissan press download

Vitesco Technologies will use Infineon’s AURIX TC4x microcontroller family in its next generation of master and zone controllers for electric-electronic vehicle architectures (E/E architectures), as well as in its new electrification system solutions, aiming to improve the efficiency and costs of electrified vehicles while taking safety and cybersecurity into account.


A three-year CERN-based program seeks to make quantum computing resources and technical expertise widely available.

The U.S. Department of Energy (DOE) announced funding of $24 million for three collaborative quantum networking projects. Argonne National Laboratory will lead the InterQnet project and Fermi National Accelerator Laboratory will lead the Advanced Quantum Networks for Scientific Discovery project. The DOE also granted Argonne and 70 partners up to $1 billion to accelerate the production and use of clean hydrogen.

Researchers are preparing to leverage Argonne’s exascale supercomputer to model the behavior of materials at an unprecedented level of detail.

CEA-Leti launched a research and development program to improve cooperation between autonomous vehicles via vehicle-to-everything (V2X) communication.

Scientists at the Leibniz Institute of Photonic Technology, in conjunction with American scientists, have developed a novel, automated process that allows the precision fabrication of thin semiconductor films with customized structural and electronic properties.

Physicists at MIT discovered another surprising property in graphene that could help engineers design ultra-low-power, high-capacity data storage devices for classical and quantum computers. “When stacked in five layers, in a rhombohedral pattern, graphene takes on a very rare, “multiferroic” state, in which the material exhibits both unconventional magnetism and an exotic type of electronic behavior, which the team has coined ferro-valleytricity.”

Fig. 4: New Graphene discovery from MIT could help advance more powerful magnetic memory devices. Source: MIT media download

Researchers at the University of Modena and Reggio Emilia published a performance/power assessment of convolutional neural network (CNN) packages on embedded automotive platforms with respect to autonomous driving systems (ADS).

Researchers at SLAC National Laboratory and Stanford University estimated energy use across layers of computing, from devices to large-scale applications in ML for natural language processing and more.

Researchers at Argonne National Laboratory, the State University of New York, and the University of Illinois studied the performance of large language models (LLMs) on novel AI accelerators.


Find upcoming chip industry events here, including:

Event Date Location
IEEE International Conference on Physical Assurance and Inspection of Electronics (PAINE) Oct 24 – 26 Huntsville, Alabama
PDF Solutions 2023 User Conference Oct 24 – 26 Santa Clara Marriott, CA
OktoberTech Silicon Valley Oct 25 Silicon Valley
ICCAD 2023: International Conference on Computer-Aided Design Oct 29 – Nov 2 San Francisco Security Trainings and Conference Netherlands 2023 Oct 30 – Nov 3 The Hague, Netherlands
MEMS and Sensors Executive Conference 2023 Nov 6 – 8 Phoenix, AZ
RISC-V Summit North America 2023 Nov 7 – 8 Santa Clara, CA
ITF Japan (Imec) Nov 9 Tokyo, Japan
ITF towards NETZERO (Imec and SEMI) Nov 14 Munich, Germany
SEMICON Europa Nov 14 – 17 Munich, Germany
Digital Safety Conference 2023 Nov 14 – 15 Detroit, MI
Ansys IDEAS 2023 Digital Forum Nov 30 Online
All Upcoming Events

Further Reading and Newsletters

Read the latest special reports and top stories, or check out the latest newsletters:

Systems and Design
Low Power-High Performance
Test, Measurement and Analytics
Manufacturing, Packaging and Materials
Automotive, Security and Pervasive Computing

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