Chip Industry Week In Review

By The SE Staff - 22 Nov, 2023 - Comments: 0

By Jesse Allen, Susan Rambo, and Liz Allan The U.S. government will invest about $3 billion for the National Advanced Packaging Manufacturing Program (NAPMP), including an advanced packaging piloting facility to help U.S. manufacturers adopt new technology and workforce training programs. It also will provide funding for projects concentrating on materials and substrates; equipment, tools, ... » read more

Chip Industry Week In Review

By The SE Staff - 03 Nov, 2023 - Comments: 0

By Susan Rambo, Gregory Haley, Jesse Allen, and Liz Allan President Biden issued an executive order on the “Safe, Secure, and Trustworthy Development and Use of Artificial Intelligence.” It says entities need to report large-scale computing clusters and the total computing power available, including “any model that was trained using a quantity of computing power greater than 1,026 inte... » read more

Chip Industry Week In Review

By The SE Staff - 20 Oct, 2023 - Comments: 0

By Susan Rambo, Gregory Haley, and Liz Allan SRC unfurled its Microelectronics and Advanced Packaging (MAPT) industry-wide 3D semiconductor roadmap, addressing such topics as advanced packaging, heterogeneous integration, analog and mixed-signal semiconductors, energy efficiency, security, the related foundational ecosystem, and more. The guidance is the collective effort of 300 individuals ... » read more

Week In Review: Automotive, Security, Pervasive Computing

By Liz Allan - 23 Jun, 2023 - Comments: 0

Stellantis and Foxconn formed a 50/50 joint venture called SiliconAuto, to be headquartered in the Netherlands. The goal is to close the gap between supply and demand for chips used in computer-controlled features and modules, especially for electric vehicles (EVs). The U.S. Department of Justice created a National Security Cyber Section within its National Security Division to increase the ... » read more

Chip Industry’s Technical Paper Roundup: June 20

By Liz Allan - 20 Jun, 2023 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=112 /] » read more

A Step Towards Eliminating The Von-Neumann Bottleneck By Co-locating Photonic Computing Elements And Non-Volatile Memory

By Technical Paper Link - 14 Jun, 2023 - Comments: 0

A technical paper titled “Non-volatile heterogeneous III-V/Si photonics via optical charge-trap memory” was published by researchers at Hewlett Packard Enterprise. "We demonstrate, for the first time, non-volatile charge-trap flash memory (CTM) co-located with heterogeneous III-V/Si photonics. The wafer-bonded III-V/Si CTM cell facilitates non-volatile optical functionality for a variety... » read more

What Formula 1 Racing Says About Auto’s High-Tech Future

By Marie C. Baca - 07 Jul, 2022 - Comments: 0

To learn about the future of the auto industry, you can interview analysts and experts, peruse scientific publications, and attend various conferences. Or you can watch multi-million dollar race cars hurtle around a track at speeds of upwards of 220 miles per hour. Welcome to Formula 1, the international auto racing sport with a cumulative TV audience of 1.55 billion people. The budgets are ... » read more

Startup Funding: April 2022

By Jesse Allen - 04 May, 2022 - Comments: 0

Silicon photonics holds the potential to vastly increase bandwidth in chips and systems while reducing power use — and investors are taking note. In April, one of the largest funding rounds went to a startup developing chip-to-chip optical I/O. But that wasn't all. Photonics funding showed up in AI with a photonic Tensor core, in room-temperature quantum computing, and, of course, in lidar an... » read more

Week In Review: Design, Low Power

By Jesse Allen - 04 Mar, 2022 - Comments: 0

Tools & IP Imperas Software introduced the RISC-V Verification Interface (RVVI). The open standard and methodology can be adapted to any configuration permitted within the RISC-V specifications. RVVI defines interfaces between RTL, reference model, and testbench for RISC-V design verification, with the aim of making RISC-V processor DV reusable. It supports multi-hart, superscalar, and out... » read more

Power/Performance Bits: Nov. 8

By Jesse Allen - 08 Nov, 2021 - Comments: 0

Molecular memristor Researchers from National University of Singapore, Indian Association for the Cultivation of Science, University of Limerick, Texas A&M University, and Hewlett Packard Enterprise discovered a molecular memristor for brain-inspired computing. The molecule uses natural asymmetry in its metal-organic bonds to switch between different states, which allows it to perform u... » read more

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tag: Hewlett Packard Enterprise

Chip Industry Week In Review

Chip Industry Week In Review

Chip Industry Week In Review

Week In Review: Automotive, Security, Pervasive Computing

Chip Industry’s Technical Paper Roundup: June 20

A Step Towards Eliminating The Von-Neumann Bottleneck By Co-locating Photonic Computing Elements And Non-Volatile Memory

What Formula 1 Racing Says About Auto’s High-Tech Future

Startup Funding: April 2022

Week In Review: Design, Low Power

Power/Performance Bits: Nov. 8

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