Big Changes Ahead For Photomask Technology

Curvilinear technology could boost yield and improve scalability, but it requires full industry support and a lot of work.


The move to curvilinear shapes on photomasks is gaining steam after years of promise as a way of improving yield, lowering defectivity, and reducing wasted space on a die — all of which are essential for both continued scaling and improved reliability in semiconductors.

Interest in this approach ran high at this year’s SPIE Photomask Technology + EUV Lithography Conference. Put simply, curvilinear shapes are a more accurate representation of features that will be printed on a mask and ultimately etched onto a wafer, allowing tighter spacing between those features. If the whole industry backs this approach, the impact could be significant. But there are challenges associated with any moves of this scale, particularly as it applies to high-volume manufacturing, and the transition is non-trivial. Moreover, even if there is broad support, it will take years to fully realize the benefits.

“Curvilinear has been present for quite a while,” says Steffen Schulze, vice president of Calibre semiconductor solutions at Siemens EDA. “There have been demonstrations of the technology, such as memory companies using it in high-density arrays with a high rate of repetition, but it was always bound by the manufacturing framework. Now it’s almost like the dam has broken for adopting curvilinear.”

There is certainly more optimism about its potential. “People have been talking about curvilinear masks for really decades,” says Chris Mack, CEO of Fractilia. “But there’s always been this cost-benefit ratio, and the cost has outweighed the benefit. Now, a couple of key enablers have changed that cost benefit ratio, and curvilinear masks might actually be practical.”

One of these enablers is the adoption of multi-beam mask writers. Historically, mask writing relied on single-beam e-beam lithography, which is time-consuming and less efficient for creating complex patterns. However, with rising demand for intricate designs and smaller nodes, the need for faster and more precise mask writing is becoming evident. Introduced in the early 2010s, these tools revolutionized mask production by allowing simultaneous writing of multiple patterns, drastically reducing write times and enabling the creation of more complex designs.

“Multi-beam mask writers have been around now for several years,” says Aki Fujimura, chairman and CEO of D2S. “Now, especially for EUV, masks are almost always 100% written by multi-beam mask writers. There is no additional penalty for having curvilinear shapes because curvy masks take no additional time to produce.”

That makes the case for curvilinear adoption much simpler. “The industry already is moving to curvilinear,” says Travis Brist, senior product marketing manager at Synopsys. “The data volume has been a barrier, which is kind of ‘in the works,’ and the mask writer has been a barrier. But the multi-beam mask writers are starting to come out, and you’re starting to see more use of those.”

The performance of this equipment has improved dramatically. “In the old-school mask writing, we would write one pixel at a time,” adds Mack. “And with a curvilinear mask, you’d have to have a smaller pixel size and smaller address size, which would dramatically increase the write times, and therefore the cost of the mask. But in the last decade, we’ve seen multi-beam mask writers become available and popular. Now they can write a curvilinear mask at the same speed that it would write a Manhattan geometry mask — and with high accuracy, too.”

Fig. 1: Intel's Frank Abboud discusses curvilinear mask challenges at SPIE. Source: Semiconductor Engineering/Gregory Haley

Fig. 1: Intel’s Frank Abboud discusses curvilinear mask challenges at SPIE. Source: Semiconductor Engineering/Gregory Haley

Another key enabler of curvilinear masking is the “multigon” format for representing curvilinear features. Designed specifically to represent curvilinear features, multigon — a collection of polygons in a single geometry — ensures that data volumes remain manageable, despite the intricate nature of these designs.

“Inverse lithography, or curvilinear lithography, was created more than 10 years ago,” says Kurt Ronse, director of the advanced patterning program at imec. “The problem was they were random patterns on the mask, and sometimes very small patterns and larger patterns and all kinds of orientations, so nobody was able to make such a mask. Plus, there was no method for storing this image that you had calculated in a standard data format. The data became way too big, and a mask shop couldn’t load it into the writer.”

This is one of the challenges with curvilinear shapes. A straight line can be defined by two points, but a curved line requires many points along the curve to get an accurate representation, and if you have a lot of undulation, you need a lot of points. The data volume for such a design would be immense.

That’s where the multigon format comes into play. Instead of relying solely on piece-wise linear representations, the multigon format introduces methods to represent curvilinear polygons, such as the quadratic Bézier curve fitting or spline fitting. These methods can capture the essence of a curvilinear shape with fewer data points, potentially leading to reduced file sizes and more efficient data processing.

“Cubic splines are the most common multigons that people are looking at because they’re very flexible,” says Mack. “Put together a few cubic splines, and you can describe a pretty complex shape with a much smaller set of numbers. But that’s a standardization effort that requires the entire industry to cooperate to make that happen. And that work is ongoing. It will be very helpful when it’s finished.”

Even transitioning to this format is complicated. “In addition to these curved features, curvilinear is bringing in much more data volume and complexity,” says Synopsys’ Brist. “So we’re looking at the multigon format as a different way of representing the data in the GDS file to reduce the volume, and things like AI and machine learning to handle the complexity of the data and make deployment faster.”

Existing tools and processes that are optimized for Manhattan structures might produce inaccurate results with curvilinear shapes. This necessitates the development of new tools, algorithms, and checks to handle the intricacies of curvilinear designs effectively.

“You can imagine, now that you have these curved features, that things that are used to looking at Manhattan structures and taking measurements between Manhattan features don’t work anymore for curved features,” adds Brist. “So you really have to create new types of checks in order to identify these features without identifying false positives or missing things. That becomes a new challenge.”

Checking for defects
Mask rule checks (MRCs) have long been the cornerstone of semiconductor design and manufacturing. These rules ensure that photomask patterns are manufacturable, and that they faithfully reproduce the intended features on the silicon wafer without defects. Historically, MRCs were tailored for Manhattan (rectilinear) structures, characterized by their right angles and straightforward design. However, as the industry shifts toward curvilinear or non-Manhattan features, the limitations of traditional MRCs become evident. These conventional checks struggle to effectively handle the nuances of curved features, leading to potential inaccuracies, false positives, or overlooked details.

“Mask rule checking in the Manhattan world is fairly well defined, but we are working with customers to identify new mask rules that are associated with the curvilinear data representation,” says Stephen Kim, director of mask and platform solutions at Siemens EDA. “I don’t think those rules have settled, but as they emerge, they are going to solidify conventions that hopefully many people can use.”

The benefits of this approach have long been understood. “With Manhattan masks, you’re really limited by the MRC constraints as to how close you can add things together,” adds Brist. “When you have four 90° edges, you quickly hit those constraints, and you can see how the printed contact there is compromised.” (see figure 2). “If you can move over into a curve regime, now you’re still meeting that MRC constraint. But because it’s curved, you actually get more coverage in there, and you’re able to print things closer to the target. We’re seeing tighter CD controls, less CD variability, lower MEEF — all of these pluses.” (The mask error enhancement factor, or MEEF, is the ratio of the CD of patterned photoresist on the wafer relative to the mask critical dimension.)

Fig. 2: Manhattan masks are more limited by MRC constraints than curvilinear masks. Source: Synopsys

Fig. 2: Manhattan masks are more limited by MRC constraints than curvilinear masks. Source: Synopsys

A possible stitching solution for high-NA EUV
Another challenge for the adoption of curvilinear masks is the need for stitching two masks together to form a complete image on the wafer. For high-NA EUV, stitching errors for the half-field mask are a major concern.

Imagine drawing a line across a field, inadvertently leaving behind minute fragments or “slivers.” These tiny features then need representation on a subsequent mask. Instead of a straight cut across the field, it might be more strategic to slightly adjust the line to encompass these slivers within the primary polygon. This approach simplifies the task, making the pieces of the puzzle fit more harmoniously, but requires AI/ML to handle the computations.

“The stitching challenges for high-NA are pretty well understood,” says imec’s Ronse. “One of the things that is completely new in high-NA is the anamorphic character of the lens that limits the size of the print area on the wafer. The magnification on the mask of the design is 8X in one direction, instead of two times 4X. The other direction is still 4X. With six-inch masks, you can only expose half of the field size on the wafer. If you have a chip that is like the typical 33 x 26, you can only scan like 15 or 16 millimeters, and then you need another mask to image the other side of the chip. And, of course, they have to fit together. That’s a big concern. No one has ever done that.”

There may be an unorthodox solution to the stitching concerns for high-NA that was recently presented by several of the major chip manufacturing companies. The basic idea is to double the size of the typical 6 x 6 in. reticle to a 6 x 12 in. mask, which could image an entire chip in one pass on a high-NA scanner and avoid the challenges of stitching. But such a major change in how photomasks are creaked would not be easy.

“Mask manufacturers would need to basically write and clean and code much bigger blanks, and they would have to be thicker to avoid any sag,” says Ronse. “They’re going to be much heavier.”

Whether mask companies will be on board with this approach is still unknown. “There’s some skeptical view of this, and whether this is something the industry is ready to take on,” said Siemens’ Schulze. “But the consensus seems to be that it’s more of an engineering problem than a scientific problem. It would take some years to get there if that’s the path people decide to go with.”

And this is where the industry is today. “Basically, what they said is that if the whole industry is aligned by the end of the year, they will start developing it,” said imec’s Ronse. “If the industry is not aligned, then of course, they’re not going to do it because it will be an expensive exercise. But the big thing is you could avoid stitching. And, secondly, the throughputs would be at least 50% higher, so that basically brings the costs down.”

But there are offsetting factors, as well. “There’s definitely some consideration for how heavy this new mask size will be,” added Siemens’ Kim, noting it would require some standardized specifications. “This gives the industry something to consider, and problems that can be anticipated so that that discussion can happen once we have such specs.”

Even if everyone agrees, it will take time to implement. “[Developing the] new equipment necessary to handle the larger masks with a new set of substrates is probably a five-year development timeline,” added Schulze. “That means we’ll have to focus on solving the stitching issues in the meantime.”

Curvilinear masks at smaller nodes
Like other technologies originally designed for the leading edge, which eventually trickle down to other areas in the flow, curvilinear mask writing is likely to migrate to older processes, as well. As the technology matures and fabs get better models and process recipes for curvilinear, there’s no reason why curvilinear would not be used for older process nodes.

“It comes down to whether the benefit justifies the extra cost,” says Fractilia’s Mack. “If there’s a desire to use curvilinear masks for EUV, it’s probably because the EUV layers justify paying the higher cost. There might be 193 layers that also justify paying the cost, and the costs will likely come down with use — in which case more than 193 layers might be justified in using curvilinear masks. That said, nobody goes back and changes an already running process, but every new process still includes a lot of 193 layers.”

Economies of scale kick in at some point. “Once curvilinear becomes even more available, and maybe as the cost of generating those masks comes down, you’ll see the use of curvilinear not just in EUV and high-NA,” says Brist. “It’s going to be running on older technologies that have previously been restricted to Manhattan-style features. Instead of running multi-patterning on an older node, or maybe even looking to try to get a new tool, companies can extend the life of their existing tools by making use of these curvilinear masks.”

That, in turn, creates a much longer tail for savings. “As the industry matures, and as this technology matures, it seems likely to proliferate down because of the advantages you get in voltage and current, reduced via count, and lower costs.” adds Schulze.

Remaining challenges for curvilinear
There are two other significant challenges to overcome before curvilinear moves into mainstream manufacturing. One is the lack of existing models and history to draw on for accurate computations.

“Experience is so important to our industry,” says Mack. “We are making incredibly complex devices with incredibly complex processes, and we rely on our history of what works and what doesn’t to inform us. Incremental changes are much easier to deal with because we can take advantage of our manufacturing history to understand what to pay attention to and what to ignore. But using curvilinear masks is a big enough change that it will require a lot of learning to overcome our lack of experience.”

This kind of shift takes time, effort, and broad industry commitment. “With Manhattan designs, we have this nice rich database to draw upon rich experience and knowledge,” said D2S’ Fujimura. “The tribal knowledge builds up over time, but we don’t know that for the curvilinear stuff. For CD, it’s well established in the industry, that it’s all the same thing. So when you have those numbers to compare, people know that it’s a meaningful comparison. While this creates a technical barrier for curvilinear, it’s not, ‘Can you do it?’ It’s more, ‘What’s the convention?'”

Another big challenge for curvilinear masks is inspection. Traditional inspection tools are optimized for Manhattan designs, which are characterized by their straightforward, right-angled structures. With curvilinear masks, the complexity increases exponentially. The intricate and varied patterns on these masks make it difficult for conventional tools to quickly and accurately identify defects. Moreover, the sheer volume of data associated with curvilinear designs can overwhelm these tools, leading to longer inspection times and potential oversights. As the industry gravitates toward curvilinear masking, there’s an urgent need to develop advanced inspection methodologies that can efficiently handle the nuances of these designs while ensuring the highest levels of accuracy and precision.

“Right now, the barrier is the inspection,” says imec’s Ronse. “If you have a curvilinear mask, you have to inspect it to see that everything is right or if there are defects. But the inspection tool can’t inspect the whole plate because it is way too much data. Now, the inspection tools are being prepared to accept this new data format for curvilinear, but that’s still probably the biggest issue today.”

Curvilinear mask inspection
There are essentially two kinds of inspection paradigms. One is a die-to-die comparison. Typical masks have more than one chip on them, and a very straightforward way to inspect them is to compare one die to the next. A high-resolution camera looks at a picture of one region, looks at a picture of the same region on the different die and compares the differences. Any difference might represent a defect because all images should be identical.

There is always the possibility of repeating defects because every die may have the same defect. That can be caused by a flaw in the design data. Still, these cases are unusual. Normally it is a random defect or a defect that stems from the ability to make a particular feature on the mask. Most of the time, all the defects can be identified with die-to-die inspection.

There is, however, the case where you only have one chip per mask, or in the case of curvilinear designs, a half-chip per mask. Ten die-to-die comparisons are not possible. Instead, you use die-to-database inspection, where you’ve got a database of what the design data is supposed to look like and you’ve got the actual mask, and then the engineer does the comparison. Die-to-database comparisons are significantly more complicated and very compute-intensive compared with die-to-die comparisons.

“Currently, there are three potential solutions for inspection,” says Fujimura. “There is traditional die-on-die inspection. Then there is actinic, which uses the same wavelength of light for inspection as will be used in the lithography process. And then there’s e-beam inspection, which can be of two forms. One is that they do e-beam inspection of masks. Or they can do e-beam inspection of wafers that have been printed with masks. In some ways, there are just too many potential technologies, and the industry’s focus and funding might be diluted.”

The age of curvilinear masking has arrived. The next step is to bring it to HVM, but that raises a number of challenges that must be aggressively addressed across the industry. From multi-beam mask writers to multigon equations and the possibility of larger reticles, processes are changing for making, computing, and altering how photomasks are created and used.

In a recent presentation, Frank Abboud, vice president in technology development for Intel’s mask operation and wafer fab metrology, called curvilinear “beautiful.” “It has value. It has value to the waveform. It has value to the OPC engines. It has a lot of value, and we need to make it happen.”

Related Reading
Assist Layers: The Unsung Heroes Of EUV Lithography
Various materials work in concert with the scanner, photoresist and photomasks to make EUV lithography work.
New Challenges Emerge With High-NA EUV
Thinner photoresist layers, line roughness, and stochastic defects add new problems for the angstrom generation of chips.
193i Lithography Takes Center Stage…Again
High-NA EUV is still in the works, but more chips/chiplets will be developed using older, less-expensive equipment.
High-NA Lithography Starting To Take Shape
First systems built, with production planned for 2025; hyper-NA to follow next decade.

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