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High-NA EUV May Be Closer Than It Appears


High-NA EUV is on track to enable scaling down to the Angstrom level, setting the stage for chips with even higher transistor counts and a whole new wave of tools, materials, and system architectures. At the recent SPIE Advanced Lithography conference, Mark Phillips, director of lithography hardware and solutions at Intel, reiterated the company’s intention to deploy the technology in high... » read more

ASD process that was performed in situ on the etch chamber


New research paper entitled "Plasma-based area selective deposition for extreme ultraviolet resist defectivity reduction and process window improvement" from TEL Technology Center, Americas and IBM Research. Abstract: "Extreme ultraviolet (EUV) lithography has overcome significant challenges to become an essential enabler to the logic scaling roadmap. However, it remains limited by stocha... » read more

Big Changes In Materials And Processes For IC Manufacturing


Rama Puligadda, CTO at Brewer Science, sat down with Semiconductor Engineering to talk about a broad set of changes in semiconductor manufacturing, packaging, and materials, and how that will affect reliability, processes, and equipment across the supply chain. SE: What role do sacrificial materials play in semiconductor manufacturing, and how is that changing at new process nodes? Puliga... » read more

Unsolved Issues In Next-Gen Photomasks


Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

Photomask Challenges At 3nm And Beyond


Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

Business, Technology Challenges Increase For Photomasks


Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

Manufacturing Bits: Nov. 16


New hybrid EUV photoresist The U.S. Department of Energy (DOE) has announced the winners for a recent entrepreneurial technology competition, including the development of a new EUV hybrid resist and an antibody therapeutics platform. The event, called the National Lab Accelerator Pitch Event, involved a competition among 11 researchers within the DOE’s national labs. Researchers pitched ... » read more

Manufacturing Bits: Nov. 2


IRDS lithography roadmap The Journal of Micro/Nanopatterning, Materials, and Metrology (JM3) has published a paper that outlines the lithography roadmap and the various challenges for the next 15 years. The paper, called the "International Roadmap for Devices and Systems lithography roadmap," projects that extreme ultraviolet (EUV) lithography and a next-generation version will remain the m... » read more

Why Mask Blanks Are Critical


Geoff Akiki, president of Hoya LSI at the Hoya Group, sat down with Semiconductor Engineering to talk about optical and extreme ultraviolet (EUV) lithography as well as mask blanks. What follows are excerpts of that discussion. SE: Mask blanks are components that serve as the base or the substrate for a photomask. Why are they critical? Akiki: If you look at Hoya, we've been positioned as... » read more

Gearing Up For High-NA EUV


The semiconductor industry is moving full speed ahead to develop high-NA EUV, but bringing up this next generation lithography system and the associated infrastructure remains a monumental and expensive task. ASML has been developing its high-numerical aperture (high-NA) EUV lithography line for some time. Basically, high-NA EUV scanners are the follow-on to today’s EUV lithography systems... » read more

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