Electroplating IC Packages


The electrochemical deposition (ECD) equipment market for IC packaging is heating up as 2.5D, 3D and fan-out technologies begin to ramp. [getentity id="22817" e_name="Applied Materials"]  recently rolled out an ECD system for IC packaging. In addition, Lam Research, TEL and others compete in the growing but competitive ECD equipment market for packaging. ECD—sometimes referred to as pl... » read more

The Week In Review: Manufacturing


Chipmakers At an event, Intel’s Technology and Manufacturing group outlined the company's vision. As part of the event, Intel reiterated what many are saying—the current node designations are meaningless and misleading. “For example, Intel estimates that its 14nm solution that has been out in the market since 2014 should be equal to 10nm solutions released by competitors in the near futu... » read more

Patterning Problems Pile Up


Chipmakers are ramping up 16nm/14nm finFET processes, with 10nm and 7nm now moving into early production. But at 10nm and beyond, chipmakers are running into a new set of problems. While shrinking feature sizes of a device down to 10nm, 7nm, 5nm and perhaps beyond is possible using current and future fab equipment, there doesn't seem to be a simple way to solve the edge placement error (EPE)... » read more

The Week In Review: Manufacturing


Chipmakers At this week’s TSMC Technology Symposium in San Jose, Calif., TSMC rolled out a dizzying array of new processes and technologies. Perhaps the most surprising announcement was a 22nm bulk CMOS process, which is geared for ultra low-power planar chips. The technology will compete against a 22nm FD-SOI technology from GlobalFoundries. Stay tuned. The battle has just begun. As e... » read more

Following Multiple Patterns


The lithography market is in flux. Today, chipmakers plan to extend today’s 193nm immersion lithography and multi-patterning to at least 10nm and 7nm. For the most critical layers, though, it’s unclear if optical lithography can extend beyond 7nm. For that reason, chipmakers hope to insert extreme ultraviolet (EUV) lithography at 7nm and/or 5nm. To get a handle on the state of patterning, S... » read more

What’s New On The MEMS Horizon?


In my previous blog post, I discussed emerging trends and the increased demand for MEMS; now I’ll focus on what we can expect in the immediate future in terms of new device technologies and MEMS-enabled products. While the more well-known MEMS such as accelerometers, gyroscopes, microphones and pressure sensors continue to grow in volume as they find new applications in things like wire... » read more

China: Fab Boom or Bust?


China’s semiconductor industry continues to expand at a frenetic pace. At present there are nearly two dozen new fab projects in China. Whether all these fab projects get off the ground is not entirely clear because the dynamics in China remain fluid. What is clear is the motivation behind this building frenzy—China is trying to reduce its huge trade imbalance in ICs. The country continu... » read more

MEMS: Improving Cost And Yield


MEMS devices inspire awe on the design side. On the test and manufacturing side, they evoke a different kind of reaction. These are, after all, the intersection of mechanical and electrical engineering—a joining of two miniature worlds that are the basis of some of the most complex technology on the planet. But getting these devices to yield sufficiently, understanding what does or does no... » read more

The Week In Review: Manufacturing


Fab tools In response to SEMI members and partners, SEMI says it is not organizing Semicon Russia 2017, or any other events in Russia this year. “In light of the current market conditions and SEMI stakeholder concerns, SEMI reached out to members and customers over the last six months to assess how to provide the most value for our community in Russia,” said Laith Altimime, president of SE... » read more

Blog Review: March 8


Mentor's Andrew Macleod proposes that the growing complexity of automotive systems opens up room for a Tier 1.5 bridging systems engineering and design optimization. Cadence's Dave Pursley argues that working at a higher level of abstraction makes hardware design more effective, more interesting, and more fun. Synopsys' Robert Vamosi considers the challenges surrounding responsible disclo... » read more

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