Complete Migration Guide for Arm-Based Cloud Workloads


Learn in three steps how to migrate your self-managed workloads to Arm virtual machines for superior price performance and energy efficiency across a wide range of applications. This guide covers the most common scenarios and provides links to additional resources. You will learn how to: -Plan your transition, survey your software stack, and understand your software dependencies. -Test, ... » read more

Chip Industry Week In Review


Imec announced a new automotive chiplet consortium to evaluate which different architectures and packaging technologies are best for automotive applications. Initial members includes Arm, ASE, Cadence, Siemens, Synopsys, Bosch, BMW, Tenstorrent, Valeo, and SiliconAuto. Imec also launched star, a global network bringing together automotive and semiconductor innovators to address technological c... » read more

The Cost Of EDA Data Storage And Processing Efficiency


Engineering teams are turning to the cloud to process and store increasing amounts of EDA data, but while the compute resources in hyperscale data centers are virtually unlimited, the move can add costs, slow access to data, and raise new concerns about sustainability. For complex chip designs, the elasticity of the cloud is a huge bonus. With advanced-node chips and packaging, the amount of... » read more

Blog Review: Oct. 9


Siemens’ Stephen Chavez looks at the key benefits and challenges to achieving a successful ECAD-MCAD collaboration. Cadence’s Nayan Gaywala shares the AXI4 locking mechanism when implementing an Xtensa LX-based multi-core system on a Xilinx FPGA platform, using a dual-core design mapped to a KC705 platform as an example. Synopsys’ Vincent van der Leest digs into SRAM PUFs and their ... » read more

Government Chip Funding Spreads Globally


This is the first in a series of articles tracking government chip investments. See part two for Americas-focused funding and part three for the UK and EMEA. Countries around the world are ramping up investments into their semiconductor industries as part of new or existing approaches. The increased government activity stems from growing awareness of the strategic importance of the chip sect... » read more

Chip Industry Week In Review


Amkor will provide turnkey advanced packaging and test services to TSMC in Amkor's planned facility in Peoria, Arizona, in a deal announced on Thursday. The companies jointly specified the packaging technologies, such as TSMC’s Integrated Fan-Out (InFO) and Chip on Wafer on Substrate (CoWoS). President Biden signed into law a bill that exempts some semiconductor projects funded by the U.S.... » read more

Partitioning In The Chiplet Era


The widespread adoption of chiplets in domain-specific applications is creating a partitioning challenge that is much more complex than anything chip design teams have dealt with in previous designs. Nearly all the major systems companies, packaging houses, IDMs, and foundries have focused on chiplets as the best path forward to improve performance and reduce power. Signal paths can be short... » read more

Barriers To Chiplet Sockets


Experts At The Table: Demand for chiplets is growing, but debate continues about whether standards and general-purpose chiplets will kick-start the commercialization boom, or whether success will come through customization of those chiplets. Semiconductor Engineeering sat down to discuss these and other related issues with Elad Alon, CEO of Blue Cheetah; Mark Kuemerle, vice president of technol... » read more

Chip Industry Week In Review


Global spending on 300mm fab equipment is expected to reach a record US$400 billion from 2025 to 2027, according to SEMI. Key drivers are the regionalization of semiconductor fabs and the increasing demand for AI chips in data centers and edge devices, with China, South Korea, and Taiwan leading the way. The Biden-Harris Administration launched the National Semiconductor Technology Center’... » read more

Blog Review: Sept. 25


Cadence’s Mamta Rana digs into how PCIe 6.1 ECN builds on the FLIT-based architecture introduced in PCIe 6.0, further optimizing flow control mechanisms to handle increased data rates and improved efficiency but making verification of shared credit updates essential. Siemens’ Nicolae Tusinschi provides a primer on formal verification, including what makes it different from simulation, pr... » read more

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