tag: ARM

Building Billions Of Batteryless Devices
By James Myers - 12 Nov, 2020 - Comments: 0

Later this month, Arm will celebrate its 30 year anniversary and the engineering milestones that have resulted in more than 180 billion Arm-based chips being shipped in everything from sensors to smartphones to the world’s fastest supercomputer. In each of these cases, much of Arm’s success has been in our dedication to delivering the highest performance per watt. But while Arm may ha... » read more

Designs Beyond The Reticle Limit
By Brian Bailey - 12 Nov, 2020 - Comments: 0

Designs continue to grow in size and complexity, but today they are reaching both physical and economic challenges. These challenges are causing a reversal of the integration trend that has provided much of the performance and power gains over the past couple of decades. The industry, far from giving up, is exploring new ways to enable designs to go beyond the reticle size, which is around 8... » read more

Difficult Memory Choices In AI Systems
By Ann Mutschler - 12 Nov, 2020 - Comments: 0

The number of memory choices and architectures is exploding, driven by the rapid evolution in AI and machine learning chips being designed for a wide range of very different end markets and systems. Models for some of these systems can range in size from 10 billion to 100 billion parameters, and they can vary greatly from one chip or application to the next. Neural network training and infer... » read more

Arm Goes For Performance
By Paul McLellan - 12 Nov, 2020 - Comments: 0

At the recent Linley Processor Conference, Arm presented two processors. This was regarded as so confidential that the original pre-conference version of the presentations didn't contain the Arm one, even though that pdf was only put online about an hour before. But most of the outline of what they presented they already talked about in May, a few months ago. I said recently that this seem... » read more

Blog Review: Nov. 11
By Jesse Allen - 11 Nov, 2020 - Comments: 0

Mentor's Chris Spear proposes mixing together the compactness of the field macro style with the preciseness of the do methods when writing a UVM transaction class. Cadence's Paul McLellan looks back at the history of EPROM, some of the difficulty with actually erasing it, and the subsequent development of EEPROM. Synopsys' Tuomo Untinen explains three WPA2 authentication vulnerabilities r... » read more

Deploying Accurate Always-On Face Unlock
By Arm - 11 Nov, 2020 - Comments: 0

Accurate face verification has long been considered a challenge due to the number of variables, ranging from lighting to pose and facial expression. This white paper looks at a new approach — combining classic and modern machine learning (deep learning) techniques — that achieves 98.36% accuracy, running efficiently on Arm ML-optimized platforms, and addressing key security issues such a... » read more

Does HW Vs. SW Choice Affect Quality And Reliability?
By Bryon Moyer - 10 Nov, 2020 - Comments: 0

Electronic systems comprise both hardware and software. Which functions are implemented with hardware and which with software are decisions made based upon a wide variety of considerations, including concerns about quality and reliability. Hardware may intrinsically provide for higher device quality, but it is also the source of reliability concerns. This is in contrast with popular views of... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 06 Nov, 2020 - Comments: 0

Chipmakers Earlier this year, the semiconductor industry saw little merger and acquisition activity. More recently, though, there has been a flurry of deals. In July, ADI moved to acquire Maxim. Then, Nvidia announced plans to acquire Arm for $40 billion, followed by AMD’s proposed move to buy Xilinx for $35 billion. Not to be outdone, Marvell has announced plans to buy Inphi. Companies a... » read more

Blog Review: Nov. 4
By Jesse Allen - 04 Nov, 2020 - Comments: 0

Arm's Joshua Sowerby points to how to improve machine learning performance on mobile devices by using smart pruning to remove convolution filters from a network, reducing its size, complexity, and memory footprint. Mentor's Neil Johnson checks out how designers can write and verify RTL real-time using formal property checking in the style of test-driven development and why to give it a try. ... » read more

Speeding Up AI With Vector Instructions
By Ann Mutschler - 04 Nov, 2020 - Comments: 0

A search is underway across the industry to find the best way to speed up machine learning applications, and optimizing hardware for vector instructions is gaining traction as a key element in that effort. Vector instructions are a class of instructions that enable parallel processing of data sets. An entire array of integers or floating point numbers is processed in a single operation, elim... » read more

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