FOPLP Gains Traction in Advanced Semiconductor Packaging

By Gregory Haley - 21 Nov, 2024 - Comments: 1

Fan-Out Panel-Level Packaging (FOPLP) for advanced nodes, once hindered by manufacturability and yield challenges, is emerging as a promising solution to meet the industry’s demands for higher integration densities and cost efficiency. Traditionally, FOPLP has been a go-to solution for cost-sensitive applications in consumer electronics, IoT devices, and mid-tier automotive systems. Its ab... » read more

ECTC 2024 Session Readout: Advancement of Metrology

By Technical Paper Link - 04 Sep, 2024 - Comments: 0

A Electronic Components and Technology Conference (ECTC) session report titled "2024 ECTC Special Session Report: Advancing Metrology for Next-Generation Microelectronics" was published by NIST, Binghamton University, and TechSearch International. Abstract: "Metrology plays a pivotal role in semiconductor research, manufacturing, packaging and assembly. It is critical to the success of this... » read more

The Race To Glass Substrates

By Gregory Haley - 29 May, 2024 - Comments: 4

The chip industry is racing to develop glass for advanced packaging, setting the stage for one of the biggest shifts in chip materials in decades — and one that will introduce a broad new set of challenges that will take years to fully resolve. Glass has been discussed as a replacement material for silicon and organic substrates for more than a decade, primarily in multi-die packages. But ... » read more

AI-Driven Innovation For Manufacturing Automation

By Calvin Shiao - 18 Jan, 2024 - Comments: 0

By Calvin Shiao, AshtonWS Huang, and Alfos Hsu Artificial intelligence (AI) is changing the world and improving our lives in many ways. The semiconductor industry is a key part of the AI revolution, as it provides powerful computing chips for AI applications and leverages AI to optimize business operations and management, customer service, office workflows, as well as the intricate realms of... » read more

Goals of Going Green

By Anne Meixner - 25 Jul, 2023 - Comments: 0

The chip industry is stepping up efforts to be seen as environmentally friendly, driven by growing pressure from customers and government regulations. Some manufacturers have been addressing sustainability challenges for more than a decade, but they are becoming more aggressive in their efforts, while others are joining them. A review of sustainability reports across the semiconductor indust... » read more

Week In Review: Semiconductor Manufacturing, Test

By Gregory Haley - 21 Apr, 2023 - Comments: 0

GlobalFoundries filed suit in U.S. District Court in New York against IBM, accusing it of unlawfully disclosing IP and trade secrets to IBM partners, including Intel and Rapidus, potentially receiving hundreds of millions of dollars in licensing income and other benefits. The European Union released a €43 billion ($47 billion) plan for jumpstarting its semiconductor manufacturing industry,... » read more

As Chiplets Go Mainstream, Chip Industry Players Collaborate to Overcome New Development Challenges

By Ashley Huang - 16 Feb, 2023 - Comments: 0

The semiconductor industry is building a comprehensive chiplet ecosystem to seize on the advantages of the devices over traditional monolithic system-on-chips (SoCs) such as improved performance, lower power consumption, and greater design flexibility. With heterogeneous integration (HI) presenting significant challenges, collaboration to fulfill the potential of chiplets has become even more i... » read more

Next Generation Chip Embedding Technology For High Efficiency Power Modules and Power SiPs

By ASE - 15 Sep, 2022 - Comments: 0

Cost, performance, and package size are some of the key drivers required in the next generation of package interconnect and package structure evolution. Embedding active die into substrates was mainly driven by package miniaturization for communication handheld devices. However, in the case of power modules, miniaturization is not the only driver that enhances the need for embedded die substrat... » read more

Week in Review: Manufacturing, Test

By Linda Christensen - 03 Jun, 2022 - Comments: 0

Hybrid Bonding & Supercomputers At this week’s ECTC conference, CEA-Leti and Intel presented an “optimized hybrid direct-bonding, self-assembly process," which they claim has the potential to increase alignment accuracy and speed up fab throughput by several thousand dies per hour. The approach uses capillary forces of a water droplet to align dies on a target wafer. “Commercial s... » read more

A Production-Worthy Fan-Out Solution — ASE FOCoS Chip Last

By ASE - 16 Dec, 2020 - Comments: 0

The 5th Generation (5G) wireless systems popularity will push the package development into a high performance and heterogeneous integration form. For high I/O density and high performance packages, the promising Fan Out Chip on Substrate (FOCoS) provides a solution to match outsourced semiconductor assembly and testing (OSAT) capability. FOCoS is identified the Fan Out (FO) package, which can f... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: ASE Group