tag: ATE

4 Issues In Test
By Ed Sperling - 10 Dec, 2018 - Comments: 0

When most design engineers think about test, they envision a large piece of equipment in the fab they probably will never actually see or interact with. But as chips become more complex—driven by an explosion in both quantity and different types of data—test is emerging as one of the big challenges in design and manufacturing. There are four primary segments for test, each with its own s... » read more

Week in Review: IoT, Security, Auto
By Jeff Dorsch - 26 Oct, 2018 - Comments: 0

Internet of Things Arm aims to accelerate Linux-based embedded design through providing quick access to the Cortex-A5 CPU under the Arm DesignStart program. Developers can work on embedded and Internet of Things system-on-a-chip devices for gateways, medical systems, smart homes, and wearable electronics. IP access to the Cortex-A5 is now $75,000, with one-year of design support from Arm exper... » read more

Why Test Costs Will Increase
By Ed Sperling - 08 Oct, 2018 - Comments: 0

The economics of test are under siege. Long seen as a necessary but rather mundane step in ensuring chip quality, or a way of testing circuitry from the inside while it is still in use, manufacturers and design teams have paid little attention to this part of the design-through-manufacturing flow. But problems have been building for some time in three separate areas, and they could have a b... » read more

Lab-To-Fab Testing
By Ed Sperling - 08 Oct, 2018 - Comments: 0

Test equipment vendors are working on integrating testing and simulation in the lab with testing done later in the fab, setting the stage for what potentially could be the most significant change in semiconductor test in years. If they are successful, this could greatly simplify design for test, which has become increasingly difficult as chips get more complex, denser, and as more heterogene... » read more

Auto Chip Design, Test Changes Ahead
By Kevin Fogarty - 19 Sep, 2018 - Comments: 0

The automotive industry’s unceasing demand for performance, coupled with larger and more complex processors, are driving broad changes in how electronics are designed, verified and tested. What's changing is that these systems, which include AI-oriented logic developed at the most advanced process nodes, need to last several times longer than traditional IT and consumer devices, and they n... » read more

System-Level Test: Where Does It Fit?
By Astronics - 17 Sep, 2018 - Comments: 0

Our second C-Brief discusses where system-level test (SLT) best fits into your semiconductor test workflow. With automated testing equipment (ATE), a traditional workflow may consist of: Wafer sort (WS) Burn-in after packaging (BI) Combination of structural testing (ST) and functional testing (FT). As demands on high-volume manufacturing shift in response to wider industry and com... » read more

Accelerating Test Pattern Bring-Up For Rapid First Silicon Debug
By Mentor, a Siemens Business - 22 Aug, 2018 - Comments: 0

Reducing the time spent on silicon bring-up is critical in getting ICs into the hands of customers and staying competitive. Typically, the silicon bring-up process involves converting the test patterns to a tester-specific format and generating a test program that is executed by Automatic Test Equipment (ATE). This standard silicon bring-up flow is becoming too slow and expensive, especially fo... » read more

What’s in a Name?
By Jeff Dorsch - 06 Aug, 2018 - Comments: 0

Test Vision 2020 is a specialty workshop held each year during Semicon West. Formerly known as ATE Vision 2020, the program focuses on automatic test equipment and related topics. This year’s edition heard a lot about artificial intelligence, automotive electronics, and machine learning, which have been the leading topics at every tech conference I’ve attended in 2018. The workshop’s t... » read more

Accelerating Test Pattern Bring-Up For Rapid First Silicon Debug
By Mentor, a Siemens Business - 12 Jul, 2018 - Comments: 0

Reducing the time spent on silicon bring-up is critical in getting ICs into the hands of customers and staying competitive. Typically, the silicon bring-up process involves converting the test patterns to a tester-specific format and generating a test program that is executed by Automatic Test Equipment (ATE). This standard silicon bring-up flow is becoming too slow and expensive, especially fo... » read more

NIWeek Test Talk
By Jeff Dorsch - 12 Jul, 2018 - Comments: 0

Semiconductor Engineering sat down with David Hall, Chief Marketer, Semiconductor, of National Instruments, and Mike Watts, NI’s Senior Solutions Marketer, Semiconductor Test, during NIWeek 2018 in Austin, Texas. “One of the opportunities for National Instruments is that over the last 10 years, we’ve seen larger semiconductor organizations change the way they do testing both for R&... » read more

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