The Long Climb: Bringing Through Glass Vias (TGV) To High-Volume Manufacturing


The semiconductor industry is a land of peaks and valleys. It’s a place where each innovation represents the culmination of a long and often difficult climb to the summit. In the case of glass substrates, the peak of the mountain is in sight. The arrival of glass substrates comes at an opportune time, as the industry eyes new process innovations to meet the incredible demand for high perfo... » read more

Achieving Zero Defect Manufacturing Part 1: Detect & Classify


Whether the discussion is about smart manufacturing or digital transformation, one of the biggest conversations in the semiconductor industry today centers on the tremendous amount of data fabs collect and how they utilize that data. While chip makers are accumulating petabytes of data across the entire semiconductor process, a question arises: how much of that information is being fully uti... » read more

Using Deep Learning ADC For Defect Classification For Automatic Defect Inspection


In traditional semiconductor packaging, manual defect review after automated optical inspection (AOI) is an arduous task for operators and engineers, involving review of both good and bad die. It is hard to avoid human errors when reviewing millions of defect images every day, and as a result, underkill or overkill of die can occur. Automatic defect classification (ADC) can reduce the number of... » read more

Using Automatic Defect Classification To Reduce The Escape Rate Of Defects


Automated optical inspection (AOI) is a cornerstone in semiconductor manufacturing, assembly and testing facilities, and as such, it plays a crucial role in yield management and process control. Traditionally, AOI generates millions of defect images, all of which are manually reviewed by operators. This process is not only time-consuming but error prone due to human involvement and fatigue, whi... » read more

A Bare Wafer Mystery: Inspecting For Back, Edge, And Notch Defects In Advanced Nodes


It is no mystery that the semiconductor industry is always advancing, with specifications becoming increasingly stringent as defects become increasingly more difficult to discover. This is especially true in the case of the most advanced nodes, where ever-smaller flaws and deformities can result in a killer defect. To solve this More than Moore mystery, you do not need to employ the detectiv... » read more

The Human Hand: Curating Good Data And Creating An Effective Deep-Learning R2R Strategy For High-Volume Manufacturing


Currently, the semiconductor manufacturing industry uses artificial intelligence and machine learning to take data and autonomously learn from that data. With the additional data, AI and ML can be used to quickly discover patterns and determine correlations in various applications, most notably those applications involving metrology and inspection, whether in the front-end of the manufacturing ... » read more

Strategies For Faster Yield Ramps On 5nm Chips


Leading chipmakers TSMC and Samsung are producing 5nm devices in high volume production and TSMC is forging ahead with plans for first 3nm silicon by year end. But to meet such aggressive targets, engineers must identify defects and ramp yield faster than before. Getting a handle on EUV stochastic defects — non-repeating patterning defects such as microbridges, broken lines, or missing con... » read more

Demystifying ADC


ADC stands for automatic defect classification. It’s a software that classifies defects based on image and metadata such as location, ROI, and other information associated with a defect. ADC is not a mysterious black box that’s impossible to understand. Instead, ADC classifies defects the same way a human operator does, by first being trained by an expert. Then, just like human classificati... » read more

Fabs Meet Machine Learning


Aki Fujimura, chief executive of D2S, sat down with Semiconductor Engineering to discuss Moore’s Law and photomask technology. Fujimura also explained how artificial intelligence and machine learning are impacting the IC industry. What follows are excerpts of that conversation. SE: For some time, you’ve said we need more compute power. So we need faster chips at advanced nodes, but cost... » read more