Overcoming Next-Generation AESA Radar Design Challenges

By Cadence - 24 Mar, 2021 - Comments: 0

Phased array antennas were first used in military radar systems to scan the radar beam quickly across the sky to detect planes and missiles. These systems are becoming popular for a variety of applications and new active electronically scanned arrays (AESAs) are being used for radar systems in satellites and unmanned aerial vehicles. As these systems are deployed in new and novel ways, size and... » read more

5G NR Design For eMBB

By Cadence - 24 Feb, 2021 - Comments: 0

This white paper examines the design challenges for eMBB products and provides examples of how these challenges can be overcome using the co-design capabilities in Cadence AWR Design Environment software. Click here to download with registration. » read more

Modified X-Band Push-Push Oscillator Simulation And Measurement

By Cadence - 11 Nov, 2020 - Comments: 0

This eBook that explores the push-push oscillator configuration via harmonic balance (HB) computer simulation and test measurement. The unique operation of the push-push oscillator configuration is explored using HB simulation of spectral content and time-domain voltage waveforms. Dynamic load lines are investigated and utilized to explore peak signal excursion and degree of nonlinearity. Predi... » read more

5G NR Primer For Amplifier And Filter Design

By Cadence - 23 Sep, 2020 - Comments: 0

This primer examines some of the challenges engineers face when designing filters and power amplifiers for 5G New Radio (NR) communication systems. See how the Cadence AWR Design Environment platform can be used to simulate amplifier and filter performance under 5G operating conditions. Click here to continue reading. » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 28 Aug, 2020 - Comments: 0

Pervasive computing — data center, edge, IoT Marvell is working on silicon for the data infrastructure market using TSMC’s 5nm process node. Marvell says it has multiple designs already under contract for its 5nm portfolio across the carrier, enterprise, automotive, and data center markets. The first products are sampling by the end of next year. Ansys’ multiphysics signoff tools, R... » read more

Artificial Intelligence And Machine Learning Add New Capabilities to Traditional RF EDA Tools

By Cadence - 26 Aug, 2020 - Comments: 0

This article features contributions from RF EDA vendors on their various capabilities for artificial intelligence and machine learning. AWR Design Environment software is featured and highlights the network synthesis wizard. Click here to continue reading. » read more

What’s After 5G

By Bryon Moyer - 20 Jul, 2020 - Comments: 1

This year’s IEEE Symposia on VLSI Technology and Circuits (VLSI 2020) included a presentation by NTT Docomo that looked far into the future of cellular communications, setting the stage for a broad industry shift in communication. This is far from trivial. 5G only just recently entered the commercial world, and — especially with the higher millimeter-wave (mmWave) frequencies — it has ... » read more

Week In Review: Design, Low Power

By Jesse Allen - 17 Jan, 2020 - Comments: 0

Inphi Corporation and Synopsys finalized the acquisition of eSilicon. Synopsys acquired certain IP assets from eSilicon, including TCAMs and multi-port memory compilers, as well as its Interface IP portfolio with High-Bandwidth Interface (HBI) IP and a team of R&D engineers; it did not disclose terms of the deal. Inphi Corporation bought the rest of the company for approximately $216 millio... » read more

Week In Review: IoT, Security, Autos

By Susan Rambo - 17 Jan, 2020 - Comments: 0

The United States signed trade agreements with the China (phase one agreement) and North American countries Mexico and Canada this week. The SIA (Semiconductor Industry Association), which represents the U.S. semiconductor industry, applauded the agreements. Still to be worked out is the second part, or phase two, of the U.S.’s agreement with China. AI/Edge M&A Apple is acquiring edge... » read more

Week In Review: Design, Low Power

By Jesse Allen - 06 Dec, 2019 - Comments: 0

Cadence signed a deal to buy National Instruments’ AWR business unit for about $160 million in cash, a move that Cadence describes as a way to broaden its market into intelligent system design. AWR’s strength is high-frequency RF design automation tools, particularly in the millimeter wave and microwave spectrums, which are critical for radar and 5G. It also has technology for III-V materia... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: AWR

Overcoming Next-Generation AESA Radar Design Challenges

5G NR Design For eMBB

Modified X-Band Push-Push Oscillator Simulation And Measurement

5G NR Primer For Amplifier And Filter Design

Week In Review: Auto, Security, Pervasive Computing

Artificial Intelligence And Machine Learning Add New Capabilities to Traditional RF EDA Tools

What’s After 5G

Week In Review: Design, Low Power

Week In Review: IoT, Security, Autos

Week In Review: Design, Low Power