Week In Review: Auto, Security, Pervasive Computing

TSMC 3nm certs for Cadence, Synopsys, Ansys; 3GPP/GSMA security standards.


Pervasive computing — data center, edge, IoT
Marvell is working on silicon for the data infrastructure market using TSMC’s 5nm process node. Marvell says it has multiple designs already under contract for its 5nm portfolio across the carrier, enterprise, automotive, and data center markets. The first products are sampling by the end of next year. 

Ansys’ multiphysics signoff tools, RedHawk-SC and Totem, are now certified on TSMC’s 3nm process technology. Targeting power and thermal integrity and reliability analysis, the tools will help customers design AI/ML, 5G, HPC, networking and autonomous vehicle chips, says Ansys. RedHawk uses big-data analytics, elastic compute to examine huge 3nm network designs, whereas Totem is certified for transistor-level custom designs. Also, some of Ansys’ multiphysics tools —RedHawk and RaptorH — were certified for TSMC’s high-speed CoWoS (Chip-on-Wafer-on-Substrate) and InFO (Integrated Fan-Out) 2.5D and 3D advanced packaging technologies. Targeting 5G and WiFi systems, this certification covers die and package co-simulation and co-analysis for extraction, power and signal integrity analysis, power and signal electromigration (EM) analysis, and thermal analysis. Synopsys’ 3DIC compiler — used for 2.5D/3D multi-die systems in a package — also was certified for CoWoS and InFo, and is integrated with Ansys’ chip-package co-analysis tools.

Also in the act, Cadence also have tool certifications on TSMC’s CoWoS and InFo 2.5D and 3D packaging reference flow.

Synopsys has a slew of TSMC 3nm certifications based on TSMC’s latest design rule manual (DRM) and process design kits (PDKs). Synopsys’ digital design platforms for SoCs — the Fusion Compiler RTL-to-GDSII and the IC Compiler II for place-and-route — are now certified on TSMC’s 3nm process technology. Synopsys also enhanced the Design Compiler NXT, which is used for synthesis, so it works closely with IC Compiler place-and-route. Signoff, SPICE simulation, and custom design tools also have enhancements to deal with 3nm.

Arm reported that its experiment with Arm Flexible Access, which launched last year, is proving popular. New Arm customers made up more than half of the 60 customers who signed up for the flexible access, which allows use more than 75% of Arm’s IP portfolio, tools, and support without an up-front licensing commitment. Among the companies taking advantage of Arm Flexible Access are startups Hailo (AI) and Atmosic (low power SoCs).

In a reversal, Arm is keeping its IoT Platform and Data units as independent businesses, according to a report from Bloomberg.

NIC SoC company Chelsio is using Synopsys’ DesignWare 56G Ethernet PHY IP for SoC design of high-performance smart network interface cards (NICs) and server applications. The IP’s data rates range from 1.25 Gbps to 56 Gbps across standards such as Ethernet, PCI Express, OIF, and JESD.

Cadence now has its UltraLink D2D PHY IP proven in silicon on the TSMC N7 process. Full silicon characterization data is now available for N7 and re-characterized silicon data is available for N6. Cadence also said it recently taped out its UltraLink D2D IP on the TSMC N5 process and is working with early adopters before it goes test silicon becomes availability later this year. UltraLink is a high-performance, low-latency PHY for die-to-die connectivity. Cadence says the wire speed goes up to 40Gbps in an NRZ serial interface, hitting at up to 1Tbps/mm unidirectional bandwidth.

Startup BabbleLabs will be acquired by Cisco. Founded in 2017 by Chris Rowen, Raul Casas, Samer Hijazi, and Dror Maydan, the company used deep learning and speech science to cancel background noise in recorded conversations. Because Cisco’s conference platform WebEx is used globally, “an integration of BabbleLabs technology into the Webex family could have rapid and profound impact,” writes Rowen in a blog. “Moreover, the span of our AI innovation across speech enhancement, speech recognition and speech analytics meshes closely with the key innovations already underway within the Cisco Collaboration teams.”

STMicroelectronics announced that its IIS2ICLX high-accuracy inclinometer has a programmable machine-learning core. The high-accuracy, low-power, 2-axis digital inclinometer for use in applications such as industrial automation and structural-health monitoring. The inclinometer uses a MEMS accelerometer. 

Cadence’s millimeter wave (mmWave) reference flow is now certified for semiconductor foundry UMC’s 28HPC+ process technology. The flow is based on UMC’s Foundry Design Kit (FDK) — through which customers can design a transceiver IC — and includes design capture, simulation and layout implementation through Cadence’s Virtuoso and Spectre products; and parasitic extraction and analysis of interconnects at the transistor-level and across transistors using Cadence’s Quantus Extraction and EMX or AWR ASIEM 3D Planar simulators.

Qualcomm and Ericsson say they achieved first hurdle in 5G carrier aggregation by making it through interoperability tests for 5G standalone (SA) carrier aggregation across both FDD/TDD1 and TDD/TDD bands. Operators will be able to use multiple sub-6 GHz spectrum channels simultaneously to transfer data between base stations and a 5G mobile device.

The GSMA announced that mobile network equipment makers Ericsson, Huawei, Nokia and ZTE passed the new jointly developed 3GPP/GSMA Network Security Assurance Schemes (NESAS) standards, which assessed their product development and lifecycle management processes. The network equipment must support 3GPP defined functions and show a commitment to good security practices. Qualified test laboratories run security tests on the vendors’ equipment and produce a report that goes to the vendor. Ericsson’s 5G Radio Access Network (RAN) is now fully compliant says the company. Huawei reported that its 5G wireless and core network equipment — its 5G RAN gNodeB, 5G Core UDG, UDM, UNC, UPCF and LTE eNodeB — passed GSMA’s NESAS. The GSMA welcomes requests from qualified laboratories to be listed as a NESAS security test laboratory. Test laboratories need to be ISO/IEC 17025 accredited.

Subaru is using a Xilinx chip in its new ADAS technology called EyeSight. The automotive-qualified XA Zynq UltraScale+ multi-processor system-on-a-chip (MPSoC) is made in16 nm node. Xilinx’s Automotive XA Zynq UltraScale+ MPSoC family is qualified according to AEC-Q100 test specifications with full ISO26262 ASIL-C level certification. The EyeSight will provide adaptive cruise control, lane-keep assist, and pre-collision braking.

Ibeo Automotive Systems and ams are working on a solid-state LiDAR technology for advanced driver assistance systems and autonomous driving. Ibeo will deliver samples in October 2020. According to a press release, “the solid-state solution means no moving beam-steering mechanism, such as mechanical or MEMS mirrors. This brings significant benefits in terms of reliability and complexity.”

People & Companies
Analytics and chip-health monitoring company proteanTecs closed a $45-million growth equity financing round, adding new investors Koch Disruptive Technologies (KDT), Valor Equity Partners, and Atreides Management to its existing investors. WRVI Capital and Viola Ventures are among the existing investors. Cadence CEO Lip-Bu Tan, who is also a managing partner of WRVI Capital and chairman of Walden International, said in a press release: “The team has done an incredible job in taking the industry forward to an era of certainty and predictability. I am pleased to welcome the growth equity partners on board. We have a rich investment history alongside KDT and have great faith in their value.”

CyberOptics’s CyberCMM — a suite of software for a coordinate measurement machine (CMM) — was recognized by SMT China magazine with a 2020 SMT China Vision Award for Software – Process Control.

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