The Week In Review: Design


Tools Synopsys debuted new versions of its circuit simulation and custom design products. FineSim SPICE provides 2X faster simulation and Monte Carlo analysis speed, CustomSim FastSPICE offers 2X speed-up for post-layout SRAM simulation and maintains multi-core scalability by providing additional 2X speed-up on four cores, and HSPICE delivers 1.5X speed-up for large post-layout designs, accord... » read more

Trump Blocks Broadcom Bid for Qualcomm


President Trump has blocked Broadcom’s unsolicited, $117 billion takeover bid for Qualcomm, citing national security concerns. The president acted on the recommendation of the Committee on Foreign Investment in the United States, which cited the possibility of Qualcomm’s chip technology being compromised by Chinese interests, if it were acquired by Singapore-based Broadcom. The move is t... » read more

eSilicon Builds ASIC Business On Leading-Edge Chip Design


How advanced application specific integrated circuits (ASIC) chip design and manufacturing for leading-edge applications such as networking and artificial intelligence can be successfully outsourced. The company which has capabilities in 2.5D packaging, high-bandwidth memories (HBM), and silicon IP for fast memories and SerDes designs. The company has many leading system companies as custome... » read more

The Week In Review: Manufacturing


Chipmakers Intel and Micron have ended their long-running NAND joint development partnership. The companies will continue to develop NAND, but they will work independently on future generations of 3D NAND. The companies have agreed to complete the development of their third-generation of 3D NAND technology, which will be delivered towards the end of 2018. That is expected to be a 96-layer ... » read more

DAC System Design Contest


When it comes to tackling leading-edge design challenges in fun ways, there’s no better place than DAC. For DAC 2018, we’ve created a System Design Contest targeting machine learning on embedded hardware. If you think this is too leading edge for a design contest, you’d be mistaken: More than 100 teams registered for the contest. You can find a full list of the teams here. So ho... » read more

Using FPGAs For Emulation


For many years, emulators were available only to verification teams working on the largest projects in companies with deep enough pockets. Due to size rather than capabilities they were called “Big Box” emulators and typically were used in order to recover some of the time lost on RTL simulation. Meanwhile, FPGA technology has been available long enough to mature to the point where FPGA bas... » read more

Prototyping Partitioning Problems


Gaps are widening in the prototyping of large, complex chips because the speed and capacity of the FPGA is not keeping pace with rapid rollout pace of advanced ASICs. This is a new twist for a well-established market. Indeed, prototyping with FPGAs is as old as the [gettech id="31071" t_name="FPGAs"] themselves. Even before they were called FPGAs, logic accelerators or LCAs (logic cell ar... » read more

The Week in Review: IoT


Security Mocana said it is working with Avnet, Infineon Technologies, Microsoft, and Xilinx to provide Industrial Internet of Things systems that meet cybersecurity standards. The systems utilize the Avnet UltraZed-EG system-on-module, Mocana’s security software running on the Xilinx Zynq Ultrascale+ MPSoc, and Infineon’s OPTIGA Trusted Platform Module 2.0 security chip. The Microsoft Azur... » read more

The Week in Review: IoT


Finance Automile, an Internet of Things company involved in field-service businesses, has received $34 million in Series B funding led by Insight Venture Partners, bringing its total funding to $47 million. Existing investors Dawn Capital, Point Nine Capital, SaaStr Fund, and Salesforce Ventures also participated in the new round. Automile will use the money on marketing, product developmen... » read more

The Week In Review: Design


Tools Cadence unveiled a new equivalence checking tool which features a massively parallel architecture capable of scaling to 100s of CPUs and adaptive proof technology that analyzes each partition and determines the optimal formal algorithm. According to the company, the Conformal Smart Logic Equivalence Checker provides an average of 4X runtime improvement with the same resources over the pr... » read more

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