中文 English

Week In Review: Auto, Security, Pervasive Computing


Security Xilinx is investing an undisclosed amount in fabless semiconductor startup Kameleon Security, which is working on a cyber protection chip for servers, data centers, and cloud computing. The proactive Security Processing Unit (ProSPU) already secures the boot and has a root of trust (RoT). The chip will be demonstrated at the Open Compute Project (OCP) Global Summit, which is planned f... » read more

Week In Review: Design, Low Power


Tools Andes Technology certified Imperas reference models for the complete range of Andes IP cores with the new RISC-V P SIMD/DSP extension. The reference models can be used to evaluate multicore design configuration options for SoC architecture exploration and support early software development before silicon prototypes are available. Cadence's digital full flow was optimized and certified... » read more

Week In Review: Auto, Security, Pervasive Computing


Security A new security annotation standard for hardware IP is now available for download at no cost. The board of directors of the Accellera Systems Initiative, the non-profit EDA- and IP-standards organization, approved the release of the Security Annotation for Electronic Design Integration (SA-EDI) Standard 1.0. The standard, developed by Accellera’s IP Security Assurance (IPSA) Working ... » read more

Safe And Robust Machine Learning


Deploying machine learning in the real world is a lot different than developing and testing it in a lab. Quenton Hall, AI systems architect at Xilinx, examines security implications on both the inferencing and training side, the potential for disruptions to accuracy, and how accessible these models and algorithms will be when they are used at the edge and in the cloud. This involves everything ... » read more

Accelerating 5G Baseband With Adaptive SoCs


5G new radio (NR) network specifications demand new architectures for radio and access networks. While the 5G NR architecture includes new spectrum and massive MIMO (mMIMO) antennas, corresponding access networks architecture must also evolve to implement the services defined by 5G, which include enhanced Mobile Broadband, Ultra Reliable Low Latency Communications and massive Machine Type Commu... » read more

Reducing Power Delivery Overhead


The power delivery network (PDN) is a necessary overhead that typically remains in the background — until it fails. For chip design teams, the big question is how close to the edge are they willing to push it? Or put differently, is the gain worth the pain? This question is being scrutinized in very small geometry designs, where margins can make a significant difference in device performan... » read more

IoT Security: Confusing And Fragmented


Security regulations for Internet-of-Things (IoT) devices are evolving around the world, but there is no consistent set of requirements that can be applied globally — and there may never be. What exists today is a patchwork of certification labs and logos. That makes it difficult for IoT-device designers to know where to get their security blessed. Unlike in data centers, where there is a ... » read more

ACAP At The Edge With The Versal AI Edge Series


This white paper introduces the AI Edge series to the Versal ACAP portfolio, a domain-specific architecture (DSA) that meets the strenuous demands of systems implemented in the 7nm silicon process. This series is optimized to meet the performance-per-watt requirements of edge nodes at or near the analog-digital boundary. Here, immediate response to the physical world is highly valued, and in ma... » read more

Debug: The Schedule Killer


Debug often has been labeled the curse of management and schedules. It is considered unpredictable and often can happen close to the end of the development cycle, or even after – leading to frantic attempts at work-arounds. And the problem is growing. "Historically, about 40% of time is spent in debug, and that aspect is becoming more complex," says Vijay Chobisa, director of product manag... » read more

Week In Review: Design, Low Power


Synopsys will acquire the semiconductor and flat panel display solutions of BISTel. The acquisition will add an integrated and comprehensive yield management and prediction solution for manufacturing quality and efficiency. BISTel provides engineering equipment systems and AI applications for smart manufacturing in a range of industries. "Combining Synopsys' and BISTel's expertise in fab soluti... » read more

← Older posts